MB15F72ULPFT-G-BND Fujitsu Components, MB15F72ULPFT-G-BND Datasheet

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MB15F72ULPFT-G-BND

Manufacturer Part Number
MB15F72ULPFT-G-BND
Description
Manufacturer
Fujitsu Components
Datasheet

Specifications of MB15F72ULPFT-G-BND

Lead Free Status / Rohs Status
Not Compliant

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Part Number
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Part Number:
MB15F72ULPFT-G-BND-EFE1
Manufacturer:
Fujitsu
Quantity:
3 000
FUJITSU MICROELECTRONICS
Copyright©2001-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2001.6
ASSP
Dual Serial Input
PLL Frequency Synthesizer
MB15F72UL
■ DESCRIPTION
■ FEATURES
■ PACKAGES
The Fujitsu Microelectronics MB15F72UL is a serial input Phase Locked Loop (PLL) frequency synthesizer with
a 1300 MHz and a 350 MHz prescalers. A 64/65 or a 128/129 for the 1300 MHz prescaler, and a 8/9 or a 16/17
for the 350 MHz prescaler can be selected for the prescaler that enables pulse swallow operation.
The BiCMOS process is used, as a result a supply current is typically 2.5 mA at 2.7 V. The supply voltage range
is from 2.4 V to 3.6 V. A refined charge pump supplies well-balanced output current with 1.5 mA and 6 mA
selectable by serial data. The data format is the same as the previous one MB15F02SL, MB12F72SP. Fast locking
is achieved for adopting the new circuit.
The new package (BCC20) decreases a mount area of MB15F72UL more than 30% comparing with the former
BCC16 (for dual PLL) .
MB15F72UL is ideally suited for wireless mobile communications, such as CDMA.
• High frequency operation : RF synthesizer : 1300 MHz Max.
• Low power supply voltage : V
• Ultra low power supply current : I
DATA SHEET
20-pin plastic TSSOP
(FPT-20P-M06)
: IF synthesizer : 350 MHz Max.
CC
= 2.4 to 3.6 V
(V
CC
CC
= 2.5 mA Typ.
= Vp = 2.7 V, SW
IF
= SW
RF
= 0, Ta = +25 °C, in IF, RF locking state)
20-pad plastic BCC
(LCC-20P-M05)
DS04-21367-1Ea
(Continued)

Related parts for MB15F72ULPFT-G-BND

MB15F72ULPFT-G-BND Summary of contents

Page 1

FUJITSU MICROELECTRONICS DATA SHEET ASSP Dual Serial Input PLL Frequency Synthesizer MB15F72UL ■ DESCRIPTION The Fujitsu Microelectronics MB15F72UL is a serial input Phase Locked Loop (PLL) frequency synthesizer with a 1300 MHz and a 350 MHz prescalers. A 64/65 or ...

Page 2

MB15F72UL (Continued) • Direct power saving function : Power supply current in power saving mode • Software selectable charge pump current : 1.5 mA/6.0 mA Typ. • Dual modulus prescaler : 1300 MHz prescaler (64/65 or 128/129 ) /350 MHz ...

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PIN DESCRIPTION Pin no. Pin name I/O TSSOP BCC The programmable reference divider input. TCXO should be connected with OSC coupling capacitor. ⎯ Ground for OSC input buffer and the shift register circuit. ...

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MB15F72UL ■ BLOCK DIAGRAM Intermittent bit latch IF mode control (5) (IF-PLL) fin 3 IF Prescaler (1) (IF-PLL) (8/9, 16/17 Xfin 4 IF (2) OSC 1 IN (19) OR (15) Prescaler fin 17 RF (RF-PLL) Xfin 16 ...

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ABSOLUTE MAXIMUM RATINGS Parameter Power supply voltage Input voltage LD/fout Output voltage Storage temperature WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ...

Page 6

MB15F72UL ■ ELECTRICAL CHARACTERISTICS Parameter I Power supply current I Power saving current fin IF *3 Operating frequency fin *3 RF OSC IN fin IF Input sensitivity fin Pfin RF OSC IN “H” level input voltage Data, LE, “L” level ...

Page 7

Parameter Symbol “H” level output DOH *4 current Do RF “L” level output DOL current DOL DOH DOMT *6 Charge pump vs ...

Page 8

MB15F72UL ■ FUNCTIONAL DESCRIPTION 1. Pulse swallow function : = [ (P × × f ÷ VCO OSC f : Output frequency of external voltage controlled oscillator (VCO) VCO P : Preset divide ratio of ...

Page 9

Programmable Counter (LSB IF/ IF/ CN1 CN2 LDS N10 N11 ...

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MB15F72UL • Prescaler Data Setting (SW) Divide ratio Prescaler divide ratio IF-PLL Prescaler divide ratio RF-PLL • Charge Pump Current Setting (CS) Current value CS ±6 ±1 • LD/fout output Selectable Bit Setting LD/fout pin state ...

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Power Saving Mode (Intermittent Mode Control Circuit) Status PS / Normal mode H Power saving mode L The intermittent mode control circuit reduces the PLL power consumption. By setting the PS pins low, the device enters into ...

Page 12

MB15F72UL 4. Serial Data Input Timing Frequency multiplier setting is performed through a serial interface using the Data pin, Clock pin, and LE pin. Setting data is read into the shift register at the rise of the clock signal, and ...

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PHASE COMPARATOR OUTPUT WAVEFORM (FC bit "1" (FC bit "0" • ...

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MB15F72UL ■ TEST CIRCUIT (for Measuring Input Sensitivity fin/OSC fout 0.1 µF Note : Terminal number shows that ...

Page 15

TYPICAL CHARACTERISTICS 1. fin input sensitivity RF-PLL input sensitivity vs. Input frequency 10 0 −10 −20 −30 −40 −50 0 200 400 600 IF-PLL input sensitivity vs. Input frequency 10 0 SPEC −10 −20 −30 −40 −50 0 100 ...

Page 16

MB15F72UL 2. OSC input sensitivity IN 10 SPEC 0 −10 −20 −30 −40 −50 − Input sensitivity vs. Input frequency 50 100 150 200 Input frequency f (MHz) OSC = 2 2 ...

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RF-PLL Do output current • 1.5 mA mode 10.0 −10.0 • 6.0 mA mode 10.0 −10 2 0.0 1.0 2.0 3.0 Charge pump output voltage V (V) ...

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MB15F72UL PLL Do output current • 1.5 mA mode • 6.0 mA mode 18 − 10 2 −10.0 0.0 1.0 2.0 Charge pump output voltage ...

Page 19

START 100.000 000 MHz START 50.000 000 MHz fin input impedance 8.252 Ω −58.291 Ω 1 300.140 000 MHz STOP 1 500.000 000 ...

Page 20

MB15F72UL 6. OSC input impedance IN START 3.000 000 MHz 20 OSC input impedance 25.125 Ω −686.59 Ω 100.000 000 MHz 1 : −13.358 k Ω −6.5593 k Ω −1.7281 k Ω 2 ...

Page 21

REFERENCE INFORMATION for Lock up Time Phase Noise and Reference Leakage ( - , Test Circuit S.G. OSC IN fin Spectrum Analyzer • PLL Reference Leakage ATTEN dBm ∆MKR 12.7 kHz D −70. ...

Page 22

MB15F72UL (Continued) • PLL Lock Up time 720.5 MHz→757.5 MHz within ± 1 kHz Lch→Hch 2.533 ms 757.504500 MHz 757.500500 MHz 757.496500 MHz −5.000 ms 0.00 s 1.000 ms/div 22 • PLL Lock Up time 757.5 MHz→720.5 MHz within ± ...

Page 23

APPLICATION EXAMPLE OUTPUT from controller Clock Data OSC GND IN 1000 pF 1000 pF TCXO OUTPUT Notes : • Clock, Data The schmitt trigger circuit is provided (insert a pull-down or pull-up register ...

Page 24

... ORDERING INFORMATION Part number MB15F72ULPFT MB15F72ULPVA 24 must be equal voltage. Package 20-pin plastic TSSOP ...

Page 25

PACKAGE DIMENSIONS 20-pin plastic TSSOP (FPT-20P-M06) * 6.50±0.10(.256±.004) 20 INDEX LEAD No. 1 0.65(.026) 0.10(.004) 1999 FUJITSU LIMITED F20026S-2C-2 C Note These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include ...

Page 26

MB15F72UL (Continued) 20-pad plastic BCC (LCC-20P-M05) 3.60±0.10(.142±.004) 16 INDEX AREA 1 0.05(.002) 2001 FUJITSU LIMITED C20056S-c-2 0.55±0.05 (.022±.002) (Mounting height) 11 0.25±0.10 (.010±.004) 3.40±0.10 2.70(.106) (.134±.004) TYP 6 0.075±0.025 (.003±.001) (Stand off) Details of "A" part Details of ...

Page 27

MEMO MB15F72UL 27 ...

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FUJITSU MICROELECTRONICS LIMITED Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ For further information please contact: North and South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA ...

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