MC1489AD ON Semiconductor, MC1489AD Datasheet
MC1489AD
Specifications of MC1489AD
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MC1489AD Summary of contents
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MC1489, MC1489A Quad Line EIA-232D Receivers The MC1489 monolithic quad line receivers are designed to interface data terminal equipment with data communications equipment in conformance with the specifications of EIA Standard No. EIA−232D. Features • Input Resistance − 3.0 k ...
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Response Control 2 3.8 k Input 1 MC1489 MC1489A R 6 Figure 2. Representative Schematic Diagram 9 (1/4 of Circuit Shown) http://onsemi.com 1 ...
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MAXIMUM RATINGS ( 25°C, unless otherwise noted) A Power Supply Voltage Input Voltage Range Output Load Current Power Dissipation (Package Limitation, SOIC−14 and Plastic Dual In−Line Package) Derate above 25°C A Operating Ambient Temperature Range ...
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Vdc equivalent E in 3.0 V 50% 50 PLH TLH t THL 1 total parasitic capacitance which includes L probe and wiring ...
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4 6 5 INPUT VOLTAGE (V) in Figure ...
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General Information The Electronic Industries Association (EIA) has released the EIA−232D specification detailing the requirements for the interface between data processing equipment and data communications equipment. This standard specifies not only the number and type of interface leads, but also ...
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MC1489 MOS Logic - 5.0 Vdc Figure 12. Typical Translator Application − MOS to DTL or TTL Response-Control Pin 1/2 MC1489 Input 8 8.0 k Input Response-Control Pin Figure 13. Typical Paralleling of ...
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... ORDERING INFORMATION Device MC1489D MC1489DG MC1489DR2 MC1489DR2G MC1489AD MC1489ADG MC1489ADR2 MC1489ADR2G MC1489P MC1489PG MC1489AP MC1489APG MC1489M MC1489MG MC1489MEL MC1489MELG MC1489AM MC1489AMG MC1489AMEL MC1489AMELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D ...
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... SOIC−14 D SUFFIX CASE 751A 14 14 MC1489ADG MC1489DG AWLYWW AWLYWW 1 1 MC1489A MARKING DIAGRAMS 14 MC1489AP AWLYYWWG 1 SOEIAJ−14 M SUFFIX CASE 965 MC1489 ALYWG ALYWG A = Assembly Location WL Wafer Lot YY Year WW Work Week G = Pb−Free Package http://onsemi.com 9 PDIP−14 P SUFFIX CASE 646 ...
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... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...
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−T− SEATING PLANE 0.13 (0.005) PDIP−14 CASE 646−06 ISSUE http://onsemi.com 11 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. ...
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... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...