LP3936SL National Semiconductor, LP3936SL Datasheet - Page 8

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LP3936SL

Manufacturer Part Number
LP3936SL
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LP3936SL

Operating Supply Voltage (typ)
3.3/5V
Number Of Segments
6
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Package Type
LAM CSP
Pin Count
32
Mounting
Surface Mount
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
6V
Lead Free Status / Rohs Status
Compliant

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Manufacturer
Quantity
Price
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Manufacturer:
NSC
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MicroWire/SPI Interface
The Microwire transmission consists of 16-bit Write and
Read Cycles. One cycle consists of 7 Address bits, 1 Read/
Write (R/W) bit and 8 Data bits. Read is done in two cycles:
address is provided in the first cycle and the data is sent out
on the next cycle. R/W bit high state defines a Write Cycle
and low defines a Read Cycle. DO output is normally in
high-impedance state and it is active only during Write and
Read Cycles. A pull-up or pull-down resistor may be needed
in DO line if a floating logic signal can cause unintended
current consumption in other circuits where DO is con-
nected.
MicroWire Read Cycle 1
MicroWire Read Cycle 2
MicroWire Write Cycle
8
The Address and Data are transmitted MSB first. The Chip
Select signal CS must be low during the Cycle transmission.
CS resets the interface when high and it has to be taken high
between successive Cycles. Data is clocked in on the rising
edge of the SCL clock signal, while data is clocked out on the
falling edge of SCL.
The MicroWire interface mode can also support SPI inter-
face. The difference with normal SPI interface is that in
LP3936 the Read operation from a new address needs two
read cycles. If repetitive reads are made from the same
address, a correct value is obtained on every read cycle.
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