LM4041BIM3X-1.2 National Semiconductor, LM4041BIM3X-1.2 Datasheet - Page 9

• Manufacturer Part Number: LM4041BIM3X-1.2
• Manufacturer: National Semiconductor

Specifications of LM4041BIM3X-1.2

• Fixed / Adjust / Prog: Precision
• Output Voltage (max): 1.225V
• Temperature Coefficient: 20ppm/°C
• Reference Voltage Accuracy (max): 0.2
• Load Regulation: 4mV(Typ)
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 3
• Package Type: SOT-23
• Lead Free Status / Rohs Status: Not Compliant

LM4041-ADJ (Adjustable)
Electrical Characteristics (Extended Temperature Range)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
ambient thermal resistance), and T
number given in the Absolute Maximum Ratings, whichever is lower. For the LM4041, T
is 326˚C/W for the SOT-23 package, 415˚C/W for the SC70 package and 180˚C/W with 0.4" lead length and 170˚C/W with 0.125" lead length for the TO-92 package.
Note 3: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin. All pins are rated at 2kV for Human Body Model, but the feedback pin which is rated at 1kV.
Note 4: Typicals are at T
Note 5: Limits are 100% production tested at 25˚C. Limits over temperature are guaranteed through correlation using Statistical Quality Control (SQC) methods.
The limits are used to calculate National’s AOQL.
Note 6: The boldface (over-temperature) limit for Reverse Breakdown Voltage Tolerance is defined as the room temperature Reverse Breakdown Voltage Tolerance
to T
max∆T=65˚C is shown below:
The total over-temperature tolerance for the different grades in the extended temperature range where max ∆T = 100 ˚C is shown below:
Therefore, as an example, the A-grade LM4041-1.2 has an over-temperature Reverse Breakdown Voltage tolerance of
Note 7: When V
the die (-) output and the package (-) output pin. See the Output Saturation (SOT-23 only) curve in the Typical Performance Characteristics section.
Note 8: Reference voltage and temperature coefficient will change with output voltage. See Typical Performance Characteristics curves.
Note 9: Load regulation is measured on pulse basis from no load to the specified load current. Ouput changes due to die temperature change must be taken into
account separately.-
Note 10: Thermal hysteresis is defined as the difference in voltage measured at +25˚C after cycling to temperature -40˚C and the 25˚C measurement after cycling
to temperature +125˚C.
±
[(∆V
MAX
R
v∆T)(max ∆T)(V
A-grade:
B-grade:
C-grade:
D-grade:
E-grade:
B-grade:
C-grade:
D-grade:
E-grade:
or T
MIN
, and V
OUT
±
±
±
±
±
±
±
±
±
≤ 1.6V, the LM4041-ADJ in the SOT-23 package must operate at reduced I
0.75% =
0.85% =
2.98% =
1.2% =
4.5% =
1.15% =
1.98% =
1.5% =
2.5% =
R
R
)]. Where, ∆V
J
is the reverse breakdown voltage. The total over-temperature tolerance for the different grades in the industrial temperature range where
= 25˚C and represent most likely parametric norm.
±
±
±
±
±
±
±
±
±
0.2%
2.0%
0.5%
1.0%
0.1%
0.2%
2.0%
0.5%
1.0%
A
(ambient temperature). The maximum allowable power dissipation at any temperature is PD
R
/∆T is the V
±
±
±
±
±
±
±
±
±
100 ppm/˚C x 100˚C
150 ppm/˚C x 100˚C
100 ppm/˚C x 100˚C
150 ppm/˚C x 100˚C
100 ppm/˚C x 65˚C
100 ppm/˚C x 65˚C
150 ppm/˚C x 65˚C
100 ppm/˚C x 65˚C
150 ppm/˚C x 65˚C
R
temperature coefficient, max∆T is the maximum difference in temperature from the reference point of 25 ˚C
9
Jmax
= 125˚C, and the typical thermal resistance (θ
R
. This is caused by the series resistance of the die attach between
Jmax
(maximum junction temperature), θ
±
1.2V x 0.75% =
(Continued)
max
JA
= (T
), when board mounted,
±
9.2 mV.
Jmax
− T
www.national.com
JA
A
)/θ
(junction to
JA
or the