LP3952RLX National Semiconductor, LP3952RLX Datasheet
LP3952RLX
Specifications of LP3952RLX
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LP3952RLX Summary of contents
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... LED outputs can be also controlled with external PWM signal. Small micro SMDxt package together with minimum number of external components is a best fit for handheld devices. Typical Applications © 2007 National Semiconductor Corporation Features ■ Constant current and PWM controlled color LED drivers ■ ...
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... Connection Diagrams and Package Mark Information CONNECTION DIAGRAMS 36-bump Micro SMDxt Package, 3.0 x 3.0 x 0.65 mm, 0.5 mm pitch NS Package Number RLA36AAA PACKAGE MARK Ordering Information Order Number LP3952RL LP3952RLX www.national.com 30023872 Package Marking Supplied As D62B TNR 250 D62B TNR 1000 2 30023873 30023874 ...
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Pin Descriptions Pin # Name Type 6F SW Output 6E FB Input 6D GND Ground 6C R1 Output 6B G1 Output 6A B1 Output 5F GND_SW Ground 5E GND Ground 5D V Power DDIO 5C SDA Logic Input/Output 5B IRGB ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. V (SW, FB, R1-2, G1-2, B1-2) (Notes DD1 DD2 DDIO DDA Voltage on ASE, IRT, IRGB, VREF Voltage on Logic Pins V(all other pins): Voltage to GND ...
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... T =140°C (typ.). J Note 6: For detailed soldering specifications and information, please refer to National Semiconductor Application Note AN1412 : Micro SMDxt Wafer Level Chip Scale Package Note 7: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Note 8: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated ...
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Block Diagram www.national.com 6 30023878 ...
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Modes of Operation RESET: In the RESET mode all the internal registers are reset to the default values and the chip goes to STANDBY mode after reset. NSTBY control bit is low after reset by default. Reset is active always ...
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Magnetic Boost DC/DC Converter The LP3952 Boost DC/DC Converter generates a 4.0 – 5.3V voltage for the LEDs from single Li-Ion battery (3V…4.5V). The output voltage is controlled with an 8-bit register in 9 steps. The converter is a magnetic ...
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Magnetic Boost DC/DC Converter Electrical Characteristics Symbol Parameter I Load Current LOAD V Output Voltage Accuracy OUT (FB Pin) Output Voltage (FB Pin) RDS Switch ON Resistance ON f PWM Mode Switching boost Frequency Frequency Accuracy t Switch Pulse Minimum ...
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Boost Converter Typical Performance Characteristics Vin = 3.6V, Vout = 5.0V if not otherwise stated Boost Converter Efficiency Battery Current vs Voltage Boost Line Regulation www.national.com Boost Typical Waveforms at 100mA Load 30023810 Battery Current vs Voltage 30023812 Boost Startup ...
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Boost Load Transient, 50 mA–100 mA 30023816 Output Voltage vs Load Current 30023861 Boost Switching Frequency Efficiency at Low Load vs Autoload 11 30023817 30023862 www.national.com ...
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Functionality of Color LED Outputs (R1, G1, B1; R2, G2, B2) LP3952 has 2 sets of RGB/color LED outputs. Both sets have 3 outputs and the sets can be controlled in 4 different ways: 1. Command based pattern generator control ...
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RGB_ctrl register (00H) 1 R1, G1 and B1 are switches bit7 CC_RGB1 0 R1, G1 and B1 are constant current sinks, current limited internally 1 R2, G2 and B2 are switches CC_RGB2 bit6 0 R2, G2 and B2 are constant ...
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Command Based Pattern Generator for Color LEDs The LP3952 has an unique stand-alone command based pattern generator with 8 user controllable 16-bit commands. Since reg- isters are 8-bit long one command requires 2 write cycles. Each command has intensity level ...
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COMMAND EXECUTION TIME (CET) AND TRANSITION TIME (TT) The command execution time CET is the duration of one sin- gle command. Command execution times are defined as follows, when R =82kΩ: T CET [3:0] CET duration, ms 0000 197 0001 ...
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LOOP CONTROL Pattern generator commands can be looped using the LOOP bit (D1) in Pattern gen ctrl register (11H). If LOOP=1 the program will be looped from the command 8 register or if there is 0000 0000 and 0000 0000 ...
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Audio Synchronization The color LEDs connected to RGB outputs can be synchro- nized to incoming audio with Audio Synchronization feature. Audio Sync has 2 modes. Amplitude mode synchronizes color LEDs based on input signal’s peak amplitude. In the amplitude mode ...
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AUDIO SYNCHRONIZATION ELECTRICAL PARAMETERS Symbol Parameter Z Input Impedance of ASE IN A Audio Input Level Range IN (peak-to-peak) f Crossover Frequencies (-3 dB) 3dB Narrow Frequency Response Wide Frequency Response CONTROL OF ADC AND AUDIO SYNCHRONIZATION The following table ...
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MODE CONTROL IN FREQUENCY MODE Mode control has two setups based on audio synchronization mode select: the frequency mode and the amplitude mode. During the frequency mode user can select two filter options by MODE_CTRL as shown below. User can ...
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Overlapping mode MODE_CTRL[1:0] = [10] www.national.com Peak Input Signal Level Range vs Gain Setting 30023831 20 30023832 ...
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RGB LED Blinking Control LP3952 has a possibility to drive indicator LEDs with RGB1 outputs with programmable blinking time. Blinking function is enabled with RGB_SEL[1:0] bits set as 01b in 0BH register. R1_CYCLE_EN, G1_CYCLE_EN and B1_CYCLE_EN bits in cycle registers ...
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Values for setting the blinking cycle for RGB1 can be seen in following table: Name R1_CYCLE_EN G1_CYCLE_EN B1_CYCLE_EN R1_CYCLE[2:0] G1_CYCLE[2:0] B1_CYCLE[2:0] EN_BLINK www.national.com R1, G1 and B1 Cycle Registers (02H, 04H and 06H): Bit 3 Blinking enable 0 = disabled ...
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RGB Driver Electrical Characteristics (R1, G1, B1, R2, G2, B2 Outputs) Symbol Parameter I R1, G1, B1, R2, G2, B2 pin leakage LEAKAGE current I Maximum recommended sink current RGB Accuracy @ 37mA Current mirror ratio RGB1 and RGB2 current ...
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Shielding To shield LP3952 from high input voltages 6…7.2V the use of external 2.8V LDO is required. This 2.8V voltage protects internally the device against high voltage condition. The recommended connection is as shown in the picture below. Internally ...
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Logic Interface Electrical Characteristics ≤ ≤ (1.65V (Unless otherwise noted). DDIO DD1,2 Symbol Parameter LOGIC INPUTS ADDR_SEL, NRST, SCL, PWM, SDA V Input Low Level IL V Input High Level IH I Logic Input Current L f ...
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Register changes take an effect at the SCL rising edge during the last ACK from slave write (SDA = “0” read (SDA = “1”) ack = acknowledge (SDA pulled down by either master or slave) rs ...
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Timing Parameters V = 3.0 to 4.5V 1.65V to V DD1,2 DD_IO Symbol 1 Hold Time (repeated) START Condition 2 Clock Low Time 3 Clock High Time 4 Setup Time for a Repeated START Condition ...
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Recommended External Components OUTPUT CAPACITOR, C OUT The output capacitor C directly affects the magnitude of OUT the output ripple voltage. In general, the higher the value the lower the output ripple magnitude. Multilayer ce- OUT ramic ...
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Application Examples EXAMPLE 1 There may be cases where the audio input signal going into the LP3952 is too weak for audio synchronization. This figure presents a single-supply inverting amplifier connected to the ASE input for audio signal amplification. The ...
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EXAMPLE 2 Here, a second order RC-filter is used on the ASE input to convert a PWM signal to an analog waveform. More application information is available in the document "LP3952 Evaluation Kit". www.national.com 30 30023879 ...
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LP3952 Registers REGISTER BIT EXPLANATIONS Each register is shown with a key indicating the accessibility of the each individual bit, and the initial condition: Register Bit Accessibility and Initial Condition Key rw r –0,–1 RGB CTRL (00H) – RGB LEDS ...
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R1_ON[3:0], R1_OFF[3:0] G1_ON[3:0], G1_OFF[3:0] B1_ON[3:0], B1_OFF[3:0] R1/G1/B1 CYCLE(02H, 04H, 06H) – BLINKING CYCLE CONTROL REGISTER r-0 r-0 r-0 R1_CYCLE_EN G1_CYCLE_EN B1_CYCLE_EN R1_CYCLE[2:0] Bits 2-0 G1_CYCLE[2:0] B1_CYCLE[2:0] RGB1 ON and OFF time Bits 0000 0001 0010 0011 0100 ...
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EXT_PWM_CONTROL (07H) – EXTERNAL PWM CONTROL REGISTER D7 D6 r1_pwm g1_pwm b1_pwm r2_pwm g2_pwm b2_pwm ENABLES (0BH) – ENABLES REGISTER D7 D6 nstby en_boost r-0 rw-0 Bit 6 nstby en_boost Bit 5 en_autoload Bit 2 Bits 1-0 rgb_sel[1:0] ADC_OUTPUT (0CH) ...
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BOOST_OUTPUT (0DH) – BOOST OUTPUT VOLTAGE CONTROL REGISTER rw-0 rw-0 rw-1 Boost[7:0] BOOST_FRQ (0EH) – BOOST FREQUENCY CONTROL REGISTER r-0 r-0 r-0 freq_sel[2:0] PATTERN_GEN_CTRL (11H) – PATTERN GENERATOR CONTROL REGISTER r-0 ...
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RGB1_MAX_CURRENT (12H) – RGB1 DRIVER INDIVIDUAL MAXIMUM CURRENT CONTROL REGISTER D7 D6 r-0 r-0 ir1[1:0] ig1[1:0] ib1[1:0] www.national.com ir1[1:0] ig1[1:0] rw-0 rw-0 rw-0 Maximum current for R1 driver ir1[2:0] Maximum output current 00 Bits 5 ...
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RGB2_MAX_CURRENT (13H) – RGB2 DRIVER INDIVIDUAL MAXIMUM CURRENT CONTROL REGISTER r-0 r-0 rw-0 ir2[1:0] Bits 5-4 ig2[1:0] Bits 3-2 ib2[1:0] Bits 1 ir2[1:0] ig2[1:0] rw-0 rw-0 Maximum current for R2 driver ir2[2:0] Maximum output current ...
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AUDIO_SYNC_CTRL1 (2AH) – AUDIO SYNCHRONIZATION AND ADC CONTROL REGISTER gain_sel[2:0] rw-0 rw-0 gain_sel[2:0] sync_mode en_agc en_sync input_sel[1:0] AUDIO_SYNC_CTRL2 (2BH) – AUDIO SYNCHRONIZATION AND ADC CONTROL REGISTER r-0 r-0 en_avg mode_ctrl[1:0] speed_ctrl[1:0] www.national.com D5 D4 ...
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PATTERN CONTROL REGISTERS r[2:0] rw-0 rw-0 rw cet[1:0] rw-0 rw-0 rw-0 Bits r[2:0] 7-5A Bits g[2:0] 4-2A Command_[1:8]A – Pattern Control Register g[2:0] rw-0 rw-0 Command_[1:8]B – Pattern Control Register B ...
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Bits 1-0A cet[3:0] 7-6B Bits b[2:0] 5-3B Bits tt[2:0] 2-0B RESET (60H) - RESET REGISTER D7 D6 Writing any data to Reset Register in address 60H can reset LP3952 w-0 w-0 www.national.com Command execution time cet[3:0] CET duration, ms 0000 ...
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Physical Dimensions inches (millimeters) unless otherwise noted The dimension for X1 ,X2 and X3 are as given: — X1=3.00 mm ±0.03 mm — X2=3.00 mm ±0.03 mm — X3=0.65 mm ±0.075 mm 36-bump Micro SMDxt Package ...
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