LMX9820SB/NOPB National Semiconductor, LMX9820SB/NOPB Datasheet - Page 15

• Manufacturer Part Number: LMX9820SB/NOPB
• Manufacturer: National Semiconductor

Specifications of LMX9820SB/NOPB

• Lead Free Status / Rohs Status: Compliant

Revision 1.0
to storing all algorithms and firmware, the on-board Flash
also contains the IEEE 802 compliant Media Access Con-
troller (MAC) address (BDADDR). The firmware and the
BDADDR are programmed by National Semiconductor or
can be programmed by the customer either before assem-
bly into the host system or in system. Module firmware can
be updated as well during manufacturing or by the con-
sumer using the ISP capabilities of the LMX9820. The
LMX9820 firmware uses the internal RAM for buffers and
program variables.
7.3 CONTROL AND TRANSPORT PORT
The LMX9820 provides one Universal Asynchronous
Receiver Transmitter (UART). It supports 8-bit data formats
with or without parity and one or two stop bits. The baud
rate is generated by hardware that is programmed at boot
time. Alternatively, the speed and configuration settings
can be read out of internal memory settings. The UART
can operate at baud rates of 2.4k, 4.8k, 7.2k, 9.6k, 19.2k,
38.4k, 57.6k, 115.2k, 230.4k, 460.8k and 921.6k. It imple-
ments flow control logic (RTS, CTS) to provide hardware
handshaking capability. The UART offers wakeup from the
power save modes via the multi-input wakeup module.
UART logic thresholds are set via the IOVCC pin.
7.4 AUXILIARY PORTS
7.4.1 Reset_5100 and Reset_b
Reset_5100 and Reset_b are active low reset inputs for the
baseband controller and digital smart radio portions of the
LMX9820, respectively. These pins are normally tied
together and are connected to the host system so that the
host can initialize the LMX9820 by asserting the reset
inputs. Upon removal, the status of the module operating
environment (Env) pads are sampled and the LMX9820
enters the corresponding operational mode.
7.4.2 Operating Environment Pads (Env0 and Env1)
The module provides two operating environments (see
Table 18) depending on the state of the Env pads after the
removal of the reset inputs. At power up of the module,
Env0 and Env1 are checked to determine which operating
environment straps are selected and operating.
The ISP mode allows end-of-line or field programming of
the LMX9820 Flash memory by starting the baseband con-
troller from the boot block of memory.
7.4.3 Interface Select Inputs (ISEL1, ISEL2)
The interface selection pads are used for setting the UART
speed and settings. As ISEL1 and ISEL2 are set by internal
weak-pull-ups, the default baudrate is 921.6kbit/s. The set-
tings for Stopbits, Startbit and Parity are stored as internal
NVS parameter. If a baudrate different to the listed needs
to be used, ISEL 1 and ISEL2 have to be set to 0. This
forces the device to get also the UART speed from the
parameter table. The default baudrate value set in NVS is
Operating Environment
ISP Mode
Run (Normal) Mode (De-
fault)
Table 18. Operating Environments
(Pad B11)
Env1
1
1
(Pad E9)
Env0
0
1
15
9.6kbit/s. Default configuration in NVS is 1 Stopbit, 1 Start-
bit and No parity.
Table 19 provides the ISEL1 and ISEL2 selection settings.
7.4.4 Module and LInk Status Outputs
The LMX9820 provides signals that the host can use to
determine the real-time status of the radio link. The
TX_Switch_P signal (pad H3) is a real-time indication of
the current configuration (direction) of the transceiver. The
link status lines (Lstat_0 and Lstat_1, pads E8 and F8,
respectively) are GPIO lines controlled by the LMX9820
firmware. The Host Wakeup line (Host_wu, pad F9) is
implemented using GPIO and firmware. It is used to bring
the host processor out of Sleep mode when link activity
calls for host processing. Host_wu can also be used by the
host to check if link activity is present. If Host_wu is active,
then link activity is present and the host loses network
awareness if the operating system continues to allow the
host processor to enter the Sleep mode. Table 20 presents
the definitions of the various module and link status out-
puts.
(Pad J13)
ISEL1
x
x
x
x
x
x
1
0
1
0
Table 20. Module / Link Status Definitions
1
0
x
x
x
x
Table 19. UART Speed Selection
(Pad H13)
ISEL2
1
1
0
0
1
0
x
x
x
x
Speed (baud)
x
x
x
x
0
1
Check NVS
Interface
921.6k
115.2k
9.6k
At least 1 SPP link es-
tablished
No SPP link
Transceiver = Transmit
Transceiver = Receive
Host can Sleep
Wakeup host/host
shouldn’t Sleep
Mode
1Stop, 1Start,
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Check NVS
Check NVS
Check NVS
No Parity
Settings
UART