T555401N-DDW Atmel, T555401N-DDW Datasheet - Page 14

• Manufacturer Part Number: T555401N-DDW
• Manufacturer: Atmel

Specifications of T555401N-DDW

• Screening Level: Industrial
• Lead Free Status / Rohs Status: Supplier Unconfirmed

5. STOP OP-code
5.1
5.2
14
Password
Programming
T5554
The STOP OP-code (“11”) is used to disable the modulation until a power-on reset occurs. This
feature can be used to have a steady RF field where single transponders are collected one by
one. Each IC is read and than disabled, so that it does not interfere with the next IC.
Note:
Figure 5-1.
When password mode is on (usePWD = 1), the first 32 bits after the OP-code are regarded as
the password. They are compared bit-by-bit with the contents of block 7, starting at bit 1. If the
comparison fails, the IC will not program the memory, but restart in read mode at block 1 once
writing has completed.
Notes:
When all necessary information has been written to the T5554, programming may proceed.
There is a 32-clock delay between the end of writing and the start of programming. During this
time, Vpp - the EEPROM programming voltage - is measured and the lock bit for the block to be
programmed is examined. Furthermore, Vpp is continually monitored throughout the program-
ming cycle. If at any time Vpp is too low, the chip enters read mode immediately.
The programming time is 16 ms.
After programming is done, the T5554 enters read mode, starting with the block just pro-
grammed. If either block or sequence terminators are enabled, the block is preceded by a block
terminator. If the mode register (block 0) has been reprogrammed, the new mode will be acti-
vated after the just-programmed block has been transmitted using the previous mode.
The STOP OP-code should contain only the two OP-code bits to disable the IC. Any additional
data sent will not be ignored, and the IC will not stop modulation.
1. If PWD is not set, but the IC receives a write datastream containing any 32 bits in place of a
2) In password mode, MAXBLK should be set to a value below 7 to prevent the password from
3) Every transmission of 2 OP-code bits, 32 password bits, one lock bit, 32 data bits and 3
password, the IC will enter programming mode.
being transmitted by
address bits (= 70 bits) needs about 35 ms. Testing all 232 possible combinations (about 4.3
billion) takes about 40,000 h, or over four years. This is a sufficient password protection for a
general-purpose IDIC.
OP-code Transmission
Start gap
Read mode
Standard OP-code
Stop OP-code
1
1
0
1
Write mode
more data ...
> 64 clocks
4576D–RFID–12/06