ATA5824-PLQW 80 Atmel, ATA5824-PLQW 80 Datasheet - Page 41
ATA5824-PLQW 80
Manufacturer Part Number
ATA5824-PLQW 80
Description
Manufacturer
Atmel
Datasheet
1.ATA5824-PLQW_80.pdf
(98 pages)
Specifications of ATA5824-PLQW 80
Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Product Depth (mm)
7mm
Product Height (mm)
0.9mm
Product Length (mm)
7mm
Operating Supply Voltage (typ)
5V
Lead Free Status / Rohs Status
Compliant
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Table 12-18. Control Register 5 (Function of Bit 5, Bit 4, Bit 3, Bit 2, Bit 1 and Bit 0)
12.3.6
Table 12-20. Control Register 6 (Function of Bit 5, Bit 4, Bit 3, Bit 2, Bit 1 and Bit 0)
4829D–RKE–06/06
Lim_min5
Lim_max5
Note:
2
2
0
0
1
.
0
0
1
1
.
.
5
5
Bits Lim_max0 to Lim_max5 have no function in TX mode and FD mode Master
Control Register 6 (ADR 5)
Lim_min4
Lim_max4
2
0
0
1
.
2
4
0
0
0
1
.
.
4
Lim_min3
Bits Lim_min0 to Lim_min5 have no function in TX mode and FD mode Master.
Table 12-19. Control Register 6 (Function of Bit 7 and Bit 6)
Lim_max3
2
1
1
1
Baud1
.
3
2
1
1
0
1
.
.
3
0
0
1
1
Lim_min2
Lim_max2
2
0
0
1
.
2
Baud0
2
1
1
0
1
.
.
2
0
1
0
1
Lim_min1
Lim_max1
2
1
1
1
Function (RX Mode, TX Mode, FD Mode)
Bit-rate range 0 (B0) 1.0 Kbit/s to 2.5 Kbit/s;
T
Bit-rate range 1 (B1) 2.0 Kbit/s to 5.0 Kbit/s;
T
Bit-rate in FD mode = 1 / (168
Bit-rate range 2 (B2) 4.0 Kbit/s to 10.0 Kbit/s;
T
Bit-rate range 3 (B3) 8.0 Kbit/s to 20.0 Kbit/s;
T
Note that the receiver is not working with >10 Kbit/s in ASK mode
.
1
XDCLK
XDCLK
XDCLK
XDCLK
2
0
0
0
1
.
.
1
= 4
= 8
= 2
= 1
Lim_min0
Lim_max0
2
T
T
T
T
0
1
1
.
0
DCLK
DCLK
DCLK
DCLK
2
0
1
0
1
.
.
0
X
X
X
X
Lim
Lim
Lim
Lim
(default)
Function (RX Mode, FD Mode Slave)
(Lim_min < 10 are not Applicable)
Function (RX Mode, FD Mode Slave)
(Lim_max < 12 are not Applicable)
(T
(T
T
Lim_max
DCLK
Lim_min
(T
ATA5823/ATA5824
(T
Lim_max
)
Lim_min
= (Lim_max - 1)
= Lim_min
Lim_min
(default)
= (32 – 1)
Lim_max
= 11
(default)
10
11
63
12
13
32
63
T
XDCLK
T
T
XDCLK
XDCLK
)
T
XDCLK
)
)
)
41
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