LTC5593IUH#PBF Linear Technology, LTC5593IUH#PBF Datasheet - Page 26

• Manufacturer Part Number: LTC5593IUH#PBF
• Manufacturer: Linear Technology

Specifications of LTC5593IUH#PBF

• Operating Supply Voltage: 3.3V
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Compliant

Low Current Mode
Both mixer channels can be set to low current mode using
the I
current mode of operation when lower RF performance
is acceptable. Figure 14 shows a simplified schematic of
the I
channels operate at nominal DC current. When I
high (>2.5V), the DC currents in both channels are reduced,
thus reducing power consumption. The performance in
low power mode and normal power mode are compared
in Table 6.
Table 6. Performance Comparison Between Different Power Mode
RF = 2500MHz, Low Side LO, IF = 190MHz, ENA = ENB = High
Enable Interface
Figure 15 shows a simplified schematic of the ENA pin
interface (ENB is identical). To enable channel A, the ENA
voltage must be greater than 2.5V. If the enable function
is not required, the enable pin can be connected directly
to V
the power supply voltage (V
should occur, the supply current could be sourced through
the ESD diode, potentially damaging the IC.
The Enable pins must be pulled high or low. If left float-
ing, the on/off state of the IC will be indeterminate. If a
three-state condition can exist at the enable pins, then a
pull-up or pull-down resistor must be used.
LTC5593
APPLICATIONS INFORMATION
26
High
Low
I
SEL
CC
SEL
SEL
. The voltage at the enable pin should never exceed
pin interface. When I
pin. This allows flexibility to choose a reduced
19
18
I
(mA)
TOTAL
396
247
V
I
Figure 14. I
SEL
CCA
(dB)
8.5
7.8
G
SEL
500
C
LTC5593
Interface Schematic
CC
SEL
) by more than 0.3V. If this
(dBm)
27.7
21.6
IIP3
is set low (<0.3V), both
BIAS A
BIAS B
V
CCB
(dBm)
P1dB
5593 F14
10.4
10.0
SEL
(dB)
9.5
9.2
NF
is set
Supply Voltage Ramping
Fast ramping of the supply voltage can cause a current
glitch in the internal ESD protection circuits. Depending on
the supply inductance, this could result in a supply volt-
age transient that exceeds the maximum rating. A supply
voltage ramp time of greater than 1ms is recommended.
Spurious Output Levels
Mixer spurious output levels versus harmonics of the
RF and LO are tabulated in Table 7. The spur levels were
measured on a standard evaluation board using the test
circuit shown in Figure 1. The spur frequencies can be
calculated using the following equation:
Table 7. IF Output Spur Levels (dBc)
RF = 2500MHz, F
V
*Less than –90dBc
CC
M
f
= 3.3V, V
SPUR
0
1
2
3
4
5
6
19
17
= (M • f
V
ENA
CCIF
–48
–74
CCA
0
*
*
Figure 15. ENA Interface Schematic
RF
= 3.3V, ENA = ENB = High, I
= –3dBm, F
–40
–78
–0
RF
1
*
*
*
) – (N • f
500
–48
–75
–61
2
*
*
*
*
LO
LTC5593
= 0dBm, F
–60
–62
–85
–65
3
*
*
*
LO
N
)
–51
–69
–82
4
*
*
*
*
IF
SEL
190MHz, Low Side LO,
–83
–69
–87
= Low, T
5
*
*
*
*
CLAMP
–62
–89
6
*
*
*
*
*
C
5593 F15
= 25°C
–74
7
*
*
*
*
*
*
5593p
8
*
*
*
*
*
*
*