SST39VF400A-70-4C-EK Microchip Technology, SST39VF400A-70-4C-EK Datasheet - Page 12

• Manufacturer Part Number: SST39VF400A-70-4C-EK
• Description: Flash 256K X 16 70ns
• Manufacturer: Microchip Technology

Specifications of SST39VF400A-70-4C-EK

• Data Bus Width: 16 bit
• Memory Type: NOR
• Memory Size: 4 Mbit
• Architecture: Sectored
• Interface Type: CFI
• Access Time: 70 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 30 mA
• Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: TSOP-48
• Organization: 256 KB x 16
• Lead Free Status / Rohs Status: No RoHS Version Available

Data Sheet
TABLE 10: DC Operating Characteristics
TABLE 11: Recommended System Power-up Timings
TABLE 12: Capacitance
TABLE 13: Reliability Characteristics
©2010 Silicon Storage Technology, Inc.
Symbol
I
I
I
I
V
V
V
V
V
Symbol
T
T
Parameter
C
C
Symbol
N
T
I
DD
SB
LI
LO
LTH
PU-READ
PU-WRITE
DR
IL
IH
IHC
OL
OH
I/O
IN
END
1. Typical conditions for the Active Current shown on page 1 are average values at 25°C (room temperature),
2. Values are for 70 ns conditions. See the Multi-Purpose Flash Power Rating application note for further information.
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
2. N
1
1
1
1
and V
higher minimum specification.
1,2
END
1
1
endurance rating is qualified as a 10,000 cycle minimum for the whole device. A sector- or block-level rating would result in a
DD
Parameter
Power Supply Current
Read
Program and Erase
Standby V
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Input High Voltage (CMOS)
Output Low Voltage
Output High Voltage
V
= 3V for VF devices. Not 100% tested.
Parameter
Power-up to Read Operation
Power-up to Program/Erase Operation
Description
I/O Pin Capacitance
Input Capacitance
Parameter
Endurance
Data Retention
Latch Up
DD
2
= 3.0-3.6V for SST39LF200A/400A/800A and 2.7-3.6V for SST39VF200A/400A/800A
DD
Current
(T
A
= 25°C, f=1 Mhz, other pins open)
V
V
0.7V
DD
DD
Min
-0.3
-0.2
DD
Minimum Specification
SST39VF200A / SST39VF400A / SST39VF800A
SST39LF200A / SST39LF400A / SST39LF800A
2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash
Limits
Max
100 + I
0.8
0.2
12
30
30
20
10
1
10,000
100
DD
Units
mA
mA
µA
µA
µA
V
V
V
V
Test Conditions
Address input=V
V
CE#=V
CE#=WE#=V
CE#=V
V
V
V
V
V
I
I
OL
OH
Cycles
DD
IN
OUT
DD
DD
DD
Test Condition
Years
Units
=100 µA, V
=GND to V
=-100 µA, V
mA
=V
=V
=V
=V
Minimum
V
=GND to V
V
I/O
DD
DD
DD
DD
IN
IL
IHC
100
100
, OE#=WE#=V
= 0V
= 0V
Max
Min
Max
Max
, V
DD
IL
DD
DD
JEDEC Standard A117
JEDEC Standard A103
, OE#=V
DD
=V
JEDEC Standard 78
DD
=V
ILT
, V
=V
DD
, V
/V
DD
DD
Test Method
DD
IHT,
Max
DD
=V
Min
S71117-13-000
IH
IH
Min
=V
DD
at f=1/T
, all I/Os open
Maximum
DD
Max
12 pF
Units
6 pF
Max
µs
µs
1
RC
T10.7 1117
T11.0 1117
T12.0 1117
T13.2 1117
Min,
11/10