SST25VF040-20-4C-QA Microchip Technology, SST25VF040-20-4C-QA Datasheet - Page 13

Flash 512K X 8 14 us

SST25VF040-20-4C-QA

Manufacturer Part Number
SST25VF040-20-4C-QA
Description
Flash 512K X 8 14 us
Manufacturer
Microchip Technology
Datasheet

Specifications of SST25VF040-20-4C-QA

Memory Type
NAND
Memory Size
2 Mbit
Architecture
Sectored
Interface Type
SPI
Access Time
20 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
10 mA
Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
WSON-8
Organization
32 KB
Lead Free Status / Rohs Status
No
2 Mbit / 4 Mbit SPI Serial Flash
SST25VF040
Write-Enable (WREN)
The Write-Enable (WREN) instruction sets the Write-
Enable-Latch bit to 1 allowing Write operations to occur.
The WREN instruction must be executed prior to any Write
(Program/Erase) operation. CE# must be driven high
before the WREN instruction is executed.
Write-Disable (WRDI)
The Write-Disable (WRDI) instruction resets the Write-
Enable-Latch bit and AAI bit to 0 disabling any new Write
operations from occurring. CE# must be driven high before
the WRDI instruction is executed.
Enable-Write-Status-Register (EWSR)
The Enable-Write-Status-Register (EWSR) instruction
arms the Write-Status-Register (WRSR) instruction and
opens the status register for alteration. The Enable-Write-
Status-Register instruction does not have any effect and
will be wasted, if it is not followed immediately by the Write-
Status-Register (WRSR) instruction. CE# must be driven
low before the EWSR instruction is entered and must be
driven high before the EWSR instruction is executed.
©2006 Silicon Storage Technology, Inc.
FIGURE 12: Write Enable (WREN) Sequence
FIGURE 13: Write Disable (WRDI) Sequence
SCK
CE#
SCK
CE#
SO
SO
SI
SI
MODE 3
MODE 0
MODE 3
MODE 0
HIGH IMPEDANCE
HIGH IMPEDANCE
MSB
0 1 2 3 4 5 6 7
MSB
0 1 2 3 4 5 6 7
13
04
06
1231 F12.1
1231 F11.1
EOL Product Data Sheet
S71231(04)-00-000
10/06

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