DS2431 Maxim Integrated Products, DS2431 Datasheet - Page 5

• Manufacturer Part Number: DS2431
• Description: EEPROM
• Manufacturer: Maxim Integrated Products

Figure 2. Hierarchical Structure for 1-Wire Protocol
64-BIT LASERED ROM
Each DS2431 contains a unique ROM code that is 64 bits long. The first 8 bits are a 1-Wire family code. The next
48 bits are a unique serial number. The last 8 bits are a CRC (Cyclic Redundancy Check) of the first 56 bits. See
Figure 3 for details. The 1-Wire CRC is generated using a polynomial generator consisting of a shift register and
XOR gates as shown in Figure 4. The polynomial is X
CRC is available in Application Note 27.
The shift register bits are initialized to 0. Then starting with the least significant bit of the family code, one bit at a
time is shifted in. After the 8th bit of the family code has been entered, then the serial number is entered. After the
last bit of the serial number has been entered, the shift register contains the CRC value. Shifting in the 8 bits of the
CRC returns the shift register to all 0s.
Figure 3. 64-Bit Lasered ROM
Figure 4. 1-Wire CRC Generator
X
0
STAGE
1
st
MSB
MSB
DS2431 Command Level:
CRC Code
X
1
Commands (see Figure 9)
Commands (see Figure 7)
STAGE
8-Bit
1-Wire ROM Function
2
nd
Memory Function
DS2431-specific
LSB
X
2
STAGE
3
rd
MSB
X
3
STAGE
4
th
Polynomial = X
Available
Commands:
Read ROM
Match ROM
Search ROM
Skip ROM
Resume
Overdrive Skip
Overdrive Match
Write Scratchpad
Read Scratchpad
Copy Scratchpad
Read Memory
48-Bit Serial Number
8
5 of 24
X
+ X
8
4
+ X
STAGE
5
5
+ X
5
th
+ X
4
+ 1. Additional information about the Dallas 1-Wire
4
+ 1
Data Field
Affected:
64-bit Reg. #, RC-Flag
64-bit Reg. #, RC-Flag
64-bit Reg. #, RC-Flag
RC-Flag
RC-Flag
RC-Flag, OD-Flag
64-bit Reg. #, RC-Flag, OD-Flag
64-bit Scratchpad, Flags
64-bit Scratchpad
Data Memory, Register Page
Data Memory, Register Page
X
5
DS2431: 1024-Bit, 1-Wire EEPROM
STAGE
LSB
6
th
INPUT DATA
X
6
MSB
STAGE
8-Bit Family
Code (2Dh)
7
th
X
7
STAGE
LSB
8
LSB
th
X
8