74ABT841D NXP Semiconductors, 74ABT841D Datasheet
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74ABT841D
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74ABT841D Summary of contents
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Rev. 03 — 25 March 2010 1. General description The 74ABT841 high performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT841 bus interface register ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range −40 °C to +85 °C 74ABT841D −40 °C to +85 °C 74ABT841DB −40 °C to +85 °C 74ABT841PW 4. Functional diagram Fig 1. Logic symbol Fig 3. Logic diagram 74ABT841_3 Product data sheet Name Description SO24 plastic small outline package ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 4. Pin configuration 5.2 Pin description Table 2. Pin description Symbol GND 74ABT841_3 Product data sheet 74ABT841 GND 001aae910 Pin 9,10 23, 22, 21, 20, 19, 18, 17, 16, 15 All information provided in this document is subject to legal disclaimers. Rev. 03 — 25 March 2010 74ABT841 10-bit bus interface latch ...
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... NXP Semiconductors 6. Functional description [1] Table 3. Function table Input ↓ L ↓ [ HIGH voltage level HIGH voltage level one set-up time prior to the LOW-to-HIGH LE transition LOW voltage level LOW voltage level one set-up time prior to the LOW-to-HIGH LE transition; ↓ = HIGH-to-LOW clock transition change; ...
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... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage CC V input voltage I V HIGH-level input voltage IH V LOW-level input voltage IL I HIGH-level output current OH I LOW-level output current OL Δt/ΔV input transition rise and fall rate T ambient temperature amb 9 ...
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... NXP Semiconductors Table 6. Static characteristics Symbol Parameter I supply current CC ΔI additional supply current per input pin input capacitance I C output capacitance O [1] For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. [2] This parameter is valid for any V transition time 100 μ ...
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... NXP Semiconductors 11. Waveforms and V are typical voltage output levels that occur with the output load Fig 5. Propagation delay for data to output and V are typical voltage output levels that occur with the output load Fig 6. Propagation delay, latch enable input to output and enable pulse width ...
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... NXP Semiconductors Dn GND LE GND The shaded areas indicate when the input is permitted to change for predictable output performance. Fig 8. Data set-up and hold times negative V M pulse positive V M pulse Input pulse definition Test data and V levels are given in EXT R = Load resistance. ...
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... NXP Semiconductors 12. Package outline SO24: plastic small outline package; 24 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 mm 2.65 0.25 0.1 2.25 0.012 0.096 inches 0.1 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors SSOP24: plastic shrink small outline package; 24 leads; body width 5 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION IEC SOT340-1 Fig 11. Package outline SOT340-1 (SSOP24) ...
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... NXP Semiconductors TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • DIP 24 (SOT222-1) package removed from “Package 74ABT841 ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors 16. Contact information For more information, please visit: For sales office addresses, please send an email to: 74ABT841_3 Product data sheet http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 03 — 25 March 2010 74ABT841 10-bit bus interface latch; 3-state © ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 13 Abbreviations ...