CS5522-AS Cirrus Logic Inc, CS5522-AS Datasheet - Page 27

• Manufacturer Part Number: CS5522-AS
• Description: ADC (A/D Converters) 2-Ch 24-Bit Delta Sigma ADC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5522-AS

• Architecture: Delta-Sigma
• Conversion Rate: 0.617 KSPs
• Input Type: Voltage
• Maximum Power Dissipation: 500 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: No

DS317F8
* R indicates the bit value after the part is reset
CSR (Channel-Setup Register)
D23-D22/
D11-D10
D21-D19/
D9-D7
D18-D16/
D6-D4
D15-D13/
D3-D1
D12/D0
#1
#2
D23(MSB)
BIT
D11
A1
A1
Bits <47:36>
Bits <23:12>
Latch Outputs, A1-A0
Channel Select, CS2-
CS0
Word Rate, WR2-WR0
Gain Bits, G2-G0
Unipolar/Bipolar, U/B
Setup 1
Setup 3
D22
D10
CS5521/22
A0
A0
NAME
CS2
CS2
D21
D9
Bits <35:24>
Bits <11:0>
Setup 2
Setup 4
CS1
CS1
D20
D8
VALUE
000
001
010
100
101
001
010
100
101
001
010
100
101
011
110
000
011
110
000
011
110
111
111
111
00
0
1
Table 3. Channel-Setup Registers
CS0
CS0
D19
D7
*R Latch Output Pins A1-A0 mimic D23/D11-D22/D10 register bits.
CSR
R Select physical channel 1 (All devices)
R 15.0 Sps (2180 XIN cycles).
R 100 mV (assumes VREF Differential = 2.5 V)
R Bipolar measurement mode.
#1
#4
Select physical channel 2(All devices)
Select physical channel 3 (CS5523/24/28 only)
Select physical channel 4 (CS5523/24/28 only)
Select physical channel 5 (CS5528 only)
Select physical channel 6 (CS5528 only)
Select physical channel 7 (CS5528 only)
Select physical channel 8 (CS5528 only)
30.0 Sps (1092 XIN cycles).
61.6 Sps (532 XIN cycles).
84.5 Sps (388 XIN cycles).
101.1 Sps (324 XIN cycles).
1.88 Sps (17444 XIN cycles).
3.76 Sps (8724 XIN cycles).
7.51 Sps (4364 XIN cycles).
55 mV
25 mV
1.0 V
5.0 V
2.5 V
Not used.
Not used.
Unipolar measurement mode.
Bits <95:84>
Bits <23:12>
WR2
WR2
D18
Setup 1
Setup 7
D6
CS5523/24
WR1
WR1
D17
D5
Bits <83:72>
Bits <11:0>
Setup 2
Setup 8
WR0
WR0
D16
D4
FUNCTION
CSR
#1
#8
D15
G2
D3
G2
CS5521/22/23/24/28
Bits <191:180>
Bits <23:12>
Setup 15
Setup 1
D14
G1
D2
G1
CS5528
D13
G0
D1
G0
Bits <179:168>
Bits <11:0>
Setup 16
Setup 2
D12
U/B
U/B
D0
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