ADC1005CCJ National Semiconductor, ADC1005CCJ Datasheet
ADC1005CCJ
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ADC1005CCJ Summary of contents
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... Connection Diagram Ordering Information Part Number NOTE: All versions of this device are obsolete ADC1005BCJ-1 ADC1005BCJ ADC1005CCJ-1 TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2009 National Semiconductor Corporation 5261 Version 8 Revision 2 ADC1005 Features ■ ...
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... DC 2 5261 Version 8 Revision 2 Print Date/Time: 2009/08/26 22:47: ADC1005BCJ, ADC1005BCJ-1, −40°C ADC1005CCJ-1 ADC1005BCJ-1, ADC1005CCJ-1 Design Typ Tested Design Limit (Note 5) Limit (Note 6) (Note 7) ±0.5 ±1 ±0.5 ±1 ±0.5 ±1 4.8 2.4 4.8 7 ...
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... Version 8 Revision 2 Print Date/Time: 2009/08/26 22:47:16 ADC1005BCJ-1, ADC1005CCJ-1 Typ Tested Design Limit (Note 5) Limit Limit (Note 6) (Note 7) 2.0 0.8 1 0.005 −0.005 −1 3.1 2.7 3.1 3.5 1.8 1 ...
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AC Electrical Characteristics The following specifications apply for V apply from All other limits T MIN MAX Parameter f , Clock Frequency MIN CLK MAX Clock Duty Cycle MIN MAX t , Conversion Time MIN C ...
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Functional Diagram Typical Performance Characteristics Logic Input Threshold Voltage vs Supply Voltage 5261 Version 8 Revision 2 Delay from Falling Edge Output data Valid vs Load Capacitance 526121 5 Print Date/Time: 2009/08/26 22:47:16 526103 526122 www.national.com ...
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CLK IN Schmitt Trip Levels vs Supply Voltage Typical Linearity Error vs Clock Frequency Timing Diagrams www.national.com 526123 526125 Start Conversion 6 5261 Version 8 Revision 2 Print Date/Time: 2009/08/26 22:47:16 Output Current vs Temperature 526124 526105 ...
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Note: All timing is measured from the 50% voltage points. Byte Order DB7 MSB 1st Bit 9 2nd Bit 1 5261 Version 8 Revision 2 Output Enable and Reset INTR Byte Sequencing for ADC1005 8-Bit Data Bus Connection DB6 DB5 ...
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Block Diagram Note 9: CS shown twice for clarity. Note 10: SAR=Successive Approximation Register. Functional Description 1.0 GENERAL OPERATION A block diagram of the A/D converter is shown in of the inputs and outputs are shown and the major logic ...
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As long as the CS input and WR input remain low, the A/ D will remain in a reset state. Conversion will start after at least one of these inputs makes a low-to-high transition. 1.3 Output Control After the ...
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THE ANALOG INPUTS 3.1 Analog Differential Voltage Inputs and Common-Mode Rejection The differential inputs of these converters reduce the effects of common-mode input noise, which is defined as noise com- mon to both selected “+” and “−” inputs (60 ...
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POWER SUPPLIES Noise spikes on the V supply line can cause conversion CC errors as the comparator will respond to this noise. A low in- ductance tantalum filter capacitor should be used close to the pin and values of ...
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Typical Applications V (− ≤ ≤ XDR CC www.national.com Operating with Ratiometric Transducers Handling ±5V Analog Inputs 12 5261 Version 8 Revision 2 Print Date/Time: 2009/08/26 22:47:16 ...
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TRI-STATE Test Circuits and Waveforms 5261 Version 8 Revision 2 526107 t = =20 ns 526108 r 13 Print Date/Time: 2009/08/26 22:47: = 526109 ...
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... Physical Dimensions Order Number ADC1005BCJ, ADC1005BCJ-1 or ADC1005CCJ-1 www.national.com inches (millimeters) unless otherwise noted Hermetic Dual-In-Line Package (J) NS Package Number J20A 14 5261 Version 8 Revision 2 Print Date/Time: 2009/08/26 22:47:16 ...
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Notes 15 5261 Version 8 Revision 2 Print Date/Time: 2009/08/26 22:47:16 www.national.com ...
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