CY7C025-25JI Cypress Semiconductor Corp, CY7C025-25JI Datasheet
CY7C025-25JI
Specifications of CY7C025-25JI
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CY7C025-25JI Summary of contents
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... Control of a semaphore indicates that a shared resource is in use. An automatic power-down feature is controlled independently on each port by a chip select (CE) pin. The CY7C024/0241 and CY7C025/0251 are available in 84-pin PLCCs (CY7C024 and CY7C025 only) and 100-pin Thin Quad Plastic Flatpack (TQFP). • 3901 North First Street ...
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... CY7C0241/0251 I/O –I/O on the CY7C0241/0251 I/O I/O CONTROL CONTROL MEMORY ADDRESS ARRAY DECODER INTERRUPT CE SEMAPHORE L ARBITRATION M/S 2 CY7C024/0241 CY7C025/0251 R [3] – I/O I/O 8R 15R [2] – I/O I [1] BUSY R A (CY7C025/0251) 12R ADDRESS A 11R DECODER R/W R SEM 7C024–1 R INT R ...
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... 100 I/O 10L 5 I/O 6 11L I/O 12L 7 I/O 13L 8 GND 9 I/O 10 14L I/O 11 15L GND Notes the CY7C025/0251. 12L the CY7C025/0251. 12R 84-Pin PLCC Top View CY7C024 100-Pin TQFP Top View CY7C024 CY7C024/0241 CY7C025/0251 ...
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... Top View CY7C0241/0251 Chip Enable Read/Write Enable Output Enable Address Data Bus Input/Output Semaphore Enable Upper Byte Select Lower Byte Select Interrupt Flag Busy Flag Master or Slave Select Power Ground 4 CY7C024/0241 CY7C025/0251 INT 65 L BUSY 64 L GND 63 M/S 62 BUSY 61 R INT ...
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... IN One Port CE or Com’ – 0.2V Ind V V – 0. 0.2V [7] Active Port Outputs MAX 5 CY7C024/0241 CY7C025/0251 7C024/0241–35 7C024/0241–55 7C025/0251–35 7C025/0251– 160 150 Ambient Temperature + – + 7C024/0241–15 7C024/0241–25 7C025/0251–15 7C025/0251–25 Min. Typ. Max. Min. Typ. Max. ...
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... OUTPUT C = 30pF V TH (b) Thévenin Equivalent (Load 1) ALL INPUT PULSES 3.0V 90% 90% 10% 10% GND CY7C024/0241 CY7C025/0251 7C024/0241–35 7C024/0241–55 7C025/0251–35 7C025/0251–55 Min. Typ. Max. Min. Typ. Max. Unit 2.4 2.4 0.4 0.4 2.2 2.2 –0.7 0.8 –0.7 0.8 – ...
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... For information on port-to-port delay through RAM cells from writing port to reading port, refer to Read Timing with Busy waveform. [9] 7C024/0241–15 7C024/0241–25 7C024/0241–35 7C025/0251–15 7C025/0251–25 7C025/0251–35 Min. Max. Min. Max less than t and t is less than t HZCE LZCE HZOE 7 CY7C024/0241 CY7C025/0251 7C024/0241–55 7C025/0251–55 Min. Max. Min. Max. Unit ...
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... Note Note –t (actual –t (actual). WDD PWE DDD SD Timing reaches the CC Parameter ICC DR1 Note: 17 tested. 8 CY7C024/0241 CY7C025/0251 7C024/0241–35 7C024/0241–55 7C025/0251–35 7C025/0251–55 Min. Max. Min. Max Note Note Data Retention Mode 4.5V 4. – 0.2V ...
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... RC [18, 21, 22] t ACE t DOE t LZOE t LZCE LZCE t ABE t ACE t LZCE . This waveform cannot be used for semaphore reads access semaphore SEM = CY7C024/0241 CY7C025/0251 t OHA DATA VALID 7C024–14 t HZCE t HZOE DATA VALID t PD 7C024–15 t OHA t HZCE t HZCE 7C024– ...
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... If the CE or SEM LOW transition occurs simultaneously with or after the R/W LOW transition, the outputs remain in the high-impedance state. [23, 24, 25, 26 [26] t PWE [29] t HZWE t SD [23, 24, 25, 31 SCE LOW CE or SEM and a LOW PWE HZWE . CY7C024/0241 CY7C025/0251 [29] t HZOE LZWE NOTE 7C024– 7C024– allow the I/O drivers to turn off and data to be placed PWE ...
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... SPS [32 SCE SOP t SD DATA VALID PWE t SWRD t SOP WRITE CYCLE READ CYCLE [33, 34, 35] MATCH t SPS MATCH = CE = HIGH CY7C024/0241 CY7C025/0251 OHA VALID ADRESS t ACE DATA VALID OUT t DOE 7C024–19 7C024–20 ...
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... Timing Diagram of Read with BUSY (M/S=HIGH) ADDRESS R R/W R DATA ADDRESS L BUSY L DATA OUTL Write Timing with Busy Input (M/S=LOW) R/W BUSY Note: 36 LOW [36 MATCH t PWE t SD VALID MATCH t BLA t WDD t PWE CY7C024/0241 CY7C025/0251 BHA t BDD t DDD VALID 7C024–21 7C024–22 ...
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... BUSY will be asserted. PS [37] ADDRESS MATCH BLC ADDRESS MATCH BLC [37 ADDRESS MISMATCH t t BLA BHA ADDRESS MISMATCH t t BLA BHA 13 CY7C024/0241 CY7C025/0251 t BHC 7C024–23 t BHC 7C024–24 7C024–25 7C024–26 ...
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... Switching Waveforms (continued) Interrupt Timing Diagrams Left Side Sets INT : R ADDRESS WRITE FFF (1FFF CY7C025 R/W L INT R [39] t INS Right Side Clears INT : R ADDRESS R INT R : Right Side Sets INT L ADDRESS WRITE FFE (1FFE CY7C025 R/W R INT L [39] t INS Left Side Clears INT ...
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... Two semaphore (SEM) control pins are used for allocating shared resources. With the M/S pin, the CY7C024/0241 and CY7C025/0251 can function as a master (BUSY pins are outputs slave (BUSY pins are inputs). The CY7C024/0241 and CY7C025/0251 have an automatic power-down feature controlled by CE ...
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... Left port writes 1 to semaphore Right port writes 0 to semaphore Right port writes 1 to semaphore Left port writes 0 to semaphore Left port writes 1 to semaphore Notes: 40. A and A , 1FFF/1FFE for the CY7C025. 0L–12L 0R–12R 41. If BUSY =L, then no change. R 42. If BUSY =L, then no change. ...
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... CY7C025–25AC CY7C025–25JC CY7C025–25AI CY7C025–25JI 35 CY7C025–35AC CY7C025–35JC CY7C025–35AI CY7C025–35JI 55 CY7C025–55AC CY7C025–55JC CY7C025–55AI CY7C025–55JI Package Name Package Type A100 100-Pin Thin Quad Flat Pack J83 84-Lead Plastic Leaded Chip Carrier A100 ...
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... Ordering Code 15 CY7C0251–15AC 25 CY7C0251–25AC CY7C0251–25AI 35 CY7C0251–35AC CY7C0251–35AI 55 CY7C0251–55AC CY7C0251–55AI Document #: 38–00255–D Name Package Type A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 84-Lead Plastic Leaded Chip Carrier J83 CY7C024/0241 CY7C025/0251 51-85048-A 51-85006-A ...