M38027E8FP Renesas Electronics America, M38027E8FP Datasheet - Page 49

• Manufacturer Part Number: M38027E8FP
• Description: MCU 8-Bit 740 CISC 32KB EPROM 5V 64-Pin PQFP
• Manufacturer: Renesas Electronics America

Specifications of M38027E8FP

• Package: 64PQFP
• Family Name: 740
• Maximum Speed: 8 MHz
• Ram Size: 1 KB
• Program Memory Size: 32 KB
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Program Memory Type: EPROM
• On-chip Adc: 8-chx8-bit
• On-chip Dac: 2-chx8-bit
• Operating Temperature: -20 to 85 °C
• Number Of Timers: 4

SWITCHING CHARACTERISTICS IN MEMORY EXPANSION MODE AND MICROPROCESSOR MODE
(Extended operating temperature version)
Note 1: The RESET
Fig. 36
46
TIMING REQUIREMENTS IN MEMORY EXPANSION MODE AND MICROPROCESSOR MODE
(Extended operating temperature version)
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
c( )
wH( )
wL( )
d( –AH)
v( –AH)
d( –AL)
v( –AL)
d( –SYNC)
v( –SYNC)
d( –WR)
v( –WR)
d( –DB)
v( –DB)
wL(RD)
wL(WR)
d(AH–RD)
d(AH–WR)
d(AL–RD)
d(AL–WR)
v(RD–AH)
v(WR–AH)
v(RD–AL)
v(WR–AL)
d(WR–DB)
v(WR–DB)
d(RESET–RESET
v( –RESET)
su(ONW– )
h( –ONW)
su(DB– )
h( –DB)
su(ONW–RD)
su(ONW–WR)
h(RD–ONW)
h(WR–ONW)
su(DB–RD)
h(RD–DB)
Symbol
Symbol
Measurement output pin
the RESET input goes “H”.
Circuit for measuring output switching
characteristics
OUT
)
Before
After
Before
After
Before RD ONW input set up time
Before WR ONW input set up time
After RD ONW input hold time
After WR ONW input hold time
Before RD data bus set up time
After RD data bus hold time
After AD
After AD
After AD
After AD
After RD AD
After WR AD
After RD AD
After WR AD
After WR data bus delay time
After WR data bus valid time
RESET
RESET
After
After
After
After
SYNC delay time
SYNC valid time
RD and WR delay time
RD and WR valid time
After
After
RD pulse width, WR pulse width
RD pulse width, WR pulse width
(when one wait is valid)
clock cycle time
clock “H” pulse width
clock “L” pulse width
OUT
ONW input hold time
data bus hold time
AD
AD
AD
AD
data bus delay time
data bus valid time
OUT
OUT
15
15
7
7
ONW input set up time
data bus set up time
–AD
–AD
output goes “H” in sync with the rise of the
15
–AD
–AD
15
7
7
–AD
–AD
output delay time
output valid time (Note 1)
15
–AD
–AD
7
15
7
–AD
0
0
–AD
–AD
8
8
–AD
RD delay time
WR delay time
0
0
RD delay time
WR delay time
8
8
delay time
valid time
0
Parameter
0
delay time
valid time
8
8
valid time
valid time
valid time
valid time
CMOS output
100pF
Parameter
(V
(V
CC
CC
= 4.0 to 5.5 V, V
= 4.0 to 5.5 V, V
clock that is anywhere between about 8 cycle and 13 cycles after
Test conditions
Fig. 36
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
SS =
SS =
0 V, T
0 V, T
MITSUBISHI MICROCOMPUTERS
a
a
= –40 to 85 C, unless otherwise noted)
= –40 to 85 C, unless otherwise noted)
3t
t
t
t
t
t
c(X
c(X
c(X
c(X
c(X
c(X
Min.
IN
IN
15
10
IN
IN
IN
3
IN
0
Min.
6
6
0
)
)
)
)
0
–20
–20
–20
–20
)
–10
)
–35
–10
–10
–40
–10
60
65
0
0
Limits
2 t
3802 Group
t
t
c(X
c(X
Limits
Typ.
Typ.
20
10
25
10
20
10
10
20
15
IN
IN
c(X
5
5
5
)
)
–15
–20
IN
)
Max.
Max.
200
200
40
45
20
10
70
65
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns