DS90C383MTDX National Semiconductor, DS90C383MTDX Datasheet
DS90C383MTDX
Specifications of DS90C383MTDX
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DS90C383MTDX Summary of contents
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... This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces. Block Diagrams TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2000 National Semiconductor Corporation Features MHz shift clock support n Programmable transmitter (DS90C383) strobe select (Rising or Falling edge strobe) n Single 3 ...
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Block Diagrams (Continued) www.national.com DS90C383 Order Number DS90C383MTD or DS90C383SLC See NS Package Number MTD56 or SLC64A DS90CF384 Order Number DS90CF384MTD or DS90CF384SLC See NS Package Number MTD56 or SLC64A 2 DS012887-1 DS012887-24 ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( CMOS/TTL Input Voltage CMOS/TTL Output Voltage LVDS Receiver Input Voltage LVDS Driver Output Voltage LVDS Output Short Circuit Duration ...
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Electrical Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. Symbol Parameter TRANSMITTER SUPPLY CURRENT ICCTG Transmitter Supply Current 16 Grayscale ICCTZ Transmitter Supply Current Power Down RECEIVER SUPPLY CURRENT ICCRW Receiver Supply Current Worst Case ICCRG Receiver ...
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Transmitter Switching Characteristics Over recommended operating supply and −40˚C to +85˚C ranges unless otherwise specified Symbol TPLLS Transmitter Phase Lock Loop Set (Figure 11 ) TPDD Transmitter Power Down Delay (Figure 15 ) Receiver Switching Characteristics Over recommended operating supply ...
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AC Timing Diagrams FIGURE 2. “16 Grayscale” Test Pattern (Notes Note 6: The worst case test pattern produces a maximum toggling of digital circuits, LVDS I/O and CMOS/TTL I/O. Note 7: The 16 grayscale test pattern ...
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AC Timing Diagrams (Continued) FIGURE 5. DS90C383 (Transmitter) Input Clock Transition Time Measurements diff TCCS measured between earliest and latest LVDS edges. TxCLK Differential Low V High Edge FIGURE 6. DS90C383 (Transmitter) Channel-to-Channel Skew FIGURE 7. ...
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AC Timing Diagrams FIGURE 9. DS90C383 (Transmitter) Clock In to Clock Out Delay (Falling Edge Strobe) FIGURE 10. DS90CF384 (Receiver) Clock In to Clock Out Delay FIGURE 11. DS90C383 (Transmitter) Phase Lock Loop Set Time FIGURE 12. DS90CF384 (Receiver) Phase ...
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AC Timing Diagrams (Continued) FIGURE 13. Seven Bits of LVDS in Once Clock Cycle FIGURE 14. 21 Parallel TTL Data Inputs Mapped to LVDS Outputs FIGURE 15. Transmitter Power Down Delay 9 DS012887-15 DS012887-16 DS012887-17 www.national.com ...
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AC Timing Diagrams FIGURE 17. Transmitter LVDS Output Pulse Position Measurement www.national.com (Continued) FIGURE 16. Receiver Power Down Delay 10 DS012887-18 DS012887-26 ...
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AC Timing Diagrams (Continued) FIGURE 18. Receiver LVDS Input Strobe Position 11 DS012887-25 www.national.com ...
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AC Timing Diagrams C — Setup and Hold Time (Internal data sampling window) defined by Rspos (receiver input strobe position) min and max Tppos — Transmitter output pulse position (min and max) RSKM = Cable Skew (type, length) + Source ...
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DS90C383 TSSOP Package Pin Description — FPD Link Transmitter Pin Name I/O No. TxIN I 28 TTL level input. This includes: 8 Red, 8 Green, 8 Blue, and 4 control lines — FPLINE, FPFRAME and DRDY (also referred to as ...
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DS90C383SLC SLC64A (FBGA) Package Pin Description — FPD Link Transmitter (Continued) By Pin A7 TxCLKOUT+ A8 TxOUT3+ B1 TxIN1 B2 TxIN0 B3 LVDS GND B4 LVDS GND B5 TxOUT2- B6 TxOUT3- B7 LVDS GND TxIN3 C2 NC ...
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DS90C383SLC SLC64A (FBGA) Package Pin Description — FPD Link Transmitter (Continued) By Pin G7 TxIN21 G8 TxIN23 H1 TxIN9 H2 VCC H3 TxIN11 H4 TxIN14 H5 TxIN15 H6 TxIN18 H7 TxIN19 H8 TxIN20 G : Ground I : Input O ...
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DS90CF384 64 ball FBGA Package Pin Description — FPD Link Receiver (Continued) Pin Name I/O No. LVDS GND I 4 Ground pins for LVDS inputs Pins not connected. DS90CF384 64 ball, FBGA Package Pin Definition — FPD Link ...
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DS90CF384 64 ball, FBGA Package Pin Definition — FPD Link Receiver (Continued) By Pin F2 RxOUT26 RxIN1- F5 RxIN2+ F6 PLL GND F7 PLL VCC RxOUT25 LVDS GND G4 RxIN1+ G5 ...
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Pin Diagrams for TSSOP Packages DS90C383MTD www.national.com DS012887-22 TABLE 1. Programmable Transmitter Pin Condition Strobe Status R_FB R_FB = V Rising edge strobe CC R_FB R_FB = GND Falling edge strobe 18 DS90CF384MTD DS012887-23 ...
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Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Molded Thin Shrink Small Outline Package, JEDEC Order Number DS90C383MTD, DS90CF384MTD Dimensions show in millimeters NS Package Number MTD56 19 www.national.com ...
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... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...