70V3569S5BC Integrated Device Technology (Idt), 70V3569S5BC Datasheet - Page 7
70V3569S5BC
Manufacturer Part Number
70V3569S5BC
Description
SRAM Chip Sync Dual 3.3V 576K-Bit 16K x 36 5ns 256-Pin CABGA
Manufacturer
Integrated Device Technology (Idt)
Datasheet
1.IDT70V3569S6BFG.pdf
(17 pages)
Specifications of 70V3569S5BC
Package
256CABGA
Timing Type
Synchronous
Density
576 Kb
Data Rate Architecture
SDR
Typical Operating Supply Voltage
3.3 V
Address Bus Width
28 Bit
Number Of I/o Lines
36 Bit
Number Of Ports
2
Number Of Words
16K
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
NOTE:
1. At V
2. V
Capacitance
(T
NOTES:
1. These parameters are determined by device characterization, but are not
2. 3dV references the interpolated capacitance when the input and output switch
3. C
IDT70V3569S
High-Speed 16K x 36 Dual-Port Synchronous Pipelined Static RAM
Symbol
V
V
V
V
C
A
production tested.
from 0V to 3V or from 3V to 0V.
Symbol
OH
OH
OL
OL
C
OUT
OUT
DDQ
= +25°C, F = 1.0MH
IN
|I
|I
LO
(3.3V)
(2.5V)
(3.3V)
(2.5V)
LI
(3)
DD
|
|
is selectable (3.3V/2.5V) via OPT pins. Refer to p.4 for details.
also references C
< - 2.0V input leakages are undefined.
Input Capacitance
Output Capacitance
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
Parameter
I/O
(1)
.
Parameter
(2)
(2)
(2)
(2)
Z
(1)
) PQFP ONLY
Conditions
V
V
OUT
IN
= 3dV
= 3dV
(2)
I
I
I
I
V
CE
OL
OH
OL
OH
DDQ
0
= +4mA, V
= +2mA, V
= -4mA, V
= -2mA, V
Max.
10.5
= V
= Max., V
8
IH
or CE
4831 tbl 07
Unit
pF
pF
DDQ
DDQ
DDQ
DDQ
IN
1
6.42
= 0V to V
= V
= Min.
= Min.
= Min.
= Min.
7
IL
, V
Test Conditions
OUT
DDQ
(V
= 0V to V
DD
= 3.3V ± 150mV)
DDQ
Industrial and Commercial Temperature Ranges
Min.
2.4
2.0
___
___
___
___
70V3569S
Max.
0.4
0.4
10
10
___
___
4831 tbl 08
Unit
µA
µA
V
V
V
V