LFE2-50E-6FN672C Lattice, LFE2-50E-6FN672C Datasheet - Page 273
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFE2-50E-6FN672C
Manufacturer Part Number
LFE2-50E-6FN672C
Description
IC FPGA 48KLUTS 672FPBGA
Manufacturer
Lattice
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2-50E-6FN672C
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
*
Number Of I /o
*
Number Of Gates
*
Voltage - Supply
*
Mounting Type
*
Operating Temperature
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-50E-6FN672C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- Current page: 273 of 385
- Download datasheet (3Mb)
LFE2M35E/SE and LFE2M50E/SE Logic Signal Connections: 672 fpBGA
Lattice Semiconductor
Number
GNDIO
VCCIO
GNDIO
VCCIO
GNDIO
VCCIO
GNDIO
AD21
AD22
AD25
AC26
AE20
AE21
AF22
AF21
AE24
AE25
AF24
AA21
AA22
AB23
AB24
AA23
AB25
AB26
AA24
AA26
W19
W22
W18
W21
W23
W24
W25
Ball
U19
U20
U21
Y19
Y21
Y22
Y20
Y23
V20
Y24
V19
V21
Y26
V23
V24
RLM0_PLLCAP
PROGRAMN
Function
Ball/Pad
GNDIO8
VCCIO8
GNDIO8
VCCIO8
GNDIO3
VCCIO3
GNDIO3
PB55B
PB63B
PB62A
PB67B
PB67A
PR68B
PR68A
PR67B
PR67A
PR66B
PR66A
PR65B
PR65A
PR64B
PR64A
PR63B
PR63A
PR62B
PR62A
PR60B
PR60A
PR59B
PR59A
PR58B
PR58A
PR57B
PR57A
PR56A
PR55B
DONE
CFG2
CFG1
CFG0
CCLK
INITN
VCC
VCC
VCC
NC
NC
Bank
4
4
4
4
4
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
3
3
3
3
3
3
3
3
3
3
3
3
-
-
-
-
-
-
-
-
-
LFE2M35E/SE
RLM0_GDLLC_IN_A**/RDQ57
RLM0_GPLLC_IN_A**/RDQ57
RLM0_GPLLT_FB_A/RDQS57
RLM0_GDLLT_IN_A**/RDQ57
RLM0_GPLLT_IN_A**/RDQ57
RLM0_GPLLC_FB_A/RDQ57
RLM0_GDLLT_FB_A/RDQ57
DOUT/CSON/CSSPI1N***
RLM0_GDLLC_FB_A
D0/SPIFASTN***
Dual Function
DI/CSSPI0N***
BUSY/SISPI***
WRITEN***
CS1N***
BDQ51
BDQ60
BDQ60
BDQ69
BDQ69
CSN***
RDQ57
RDQ57
D1***
D2***
D3***
D4***
D5***
D6***
D7***
Differential
C (LVDS)*
T (LVDS)*
C (LVDS)*
T (LVDS)*
C (LVDS)*
4-173
C
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
C
T
T
LRC_SQ_HDOUTN1
LRC_SQ_HDOUTN0
LRC_SQ_HDOUTP0
LRC_SQ_VCCOB0
LRC_SQ_VCCTX1
LRC_SQ_VCCTX0
LRC_SQ_VCCRX0
LRC_SQ_HDINN0
LRC_SQ_VCCIB0
LRC_SQ_HDINP0
D0/SPIFASTN***
RLM0_PLLCAP
DI/CSSPI0N***
BUSY/SISPI***
DOUT/CSON/
PROGRAMN
CSSPI1N***
WRITEN***
Function
Ball/Pad
GNDIO8
CS1N***
VCCIO8
GNDIO3
VCCIO3
GNDIO3
CSN***
PR65B
PR65A
PR64B
PR64A
PR63B
PR63A
PR62B
PR62A
PR60A
PR59B
DONE
CFG2
CFG1
CFG0
CCLK
INITN
D1***
D2***
D3***
D4***
D5***
D6***
D7***
LatticeECP2/M Family Data Sheet
Bank
13
13
13
13
13
13
13
13
13
13
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
3
3
3
3
3
3
3
3
3
3
3
3
-
-
-
-
LFE2M50E/SE
RLM0_GDLLC_FB_A
RLM0_GPLLC_FB_A
RLM0_GDLLT_FB_A
RLM0_GDLLC_IN_A
RLM0_GPLLT_FB_A
RLM0_GPLLC_IN_A
RLM0_GDLLT_IN_A
RLM0_GPLLT_IN_A
Dual Function
Pinout Information
Differential
C*
C*
C*
T*
T*
C
C
C
C
C
T
T
T
T
T
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