LFE2M100SE-5FN900C Lattice, LFE2M100SE-5FN900C Datasheet - Page 25
LFE2M100SE-5FN900C
Manufacturer Part Number
LFE2M100SE-5FN900C
Description
IC FPGA 95KLUTS 900FPBGA
Manufacturer
Lattice
Datasheet
1.LFE2M100SE-5FN900C.pdf
(386 pages)
Specifications of LFE2M100SE-5FN900C
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
*
Number Of I /o
*
Number Of Gates
*
Voltage - Supply
*
Mounting Type
*
Operating Temperature
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2M100SE-5FN900C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
• MULT (Multiply)
• MAC (Multiply, Accumulate)
• MULTADDSUB (Multiply, Addition/Subtraction)
• MULTADDSUBSUM (Multiply, Addition/Subtraction, Accumulate)
The number of elements available on each block depends in the width selected from the three available options x9,
x18, and x36. A number of these elements are concatenated for highly parallel implementations of DSP functions.
Table 2-7 shows the capabilities of the block.
Table 2-7. Maximum Number of Elements in a Block
Some options are available in four elements. The input register in all the elements can be directly loaded or can be
loaded as a shift register from previous operand registers. By selecting “dynamic operation” the following opera-
tions are possible:
• In the ‘Signed/Unsigned’ options the operands can be switched between signed and unsigned on every cycle.
• In the ‘Add/Sub’ option the Accumulator can be switched between addition and subtraction on every cycle.
• The loading of operands can switch between parallel and serial operations.
MULT
MAC
MULTADDSUB
MULTADDSUBSUM
Width of Multiply
x9
8
2
4
2
2-22
x18
4
2
2
1
LatticeECP2/M Family Data Sheet
Architecture
x36
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1
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