NUC140VE3CN Nuvoton Technology Corporation of America, NUC140VE3CN Datasheet - Page 516
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NUC140VE3CN
Manufacturer Part Number
NUC140VE3CN
Description
IC MCU 32BIT 128KB FLASH 100LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™ NUC100r
Specifications of NUC140VE3CN
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Price
Company:
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MICRON
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Company:
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NUC140VE3CN
Manufacturer:
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Part Number:
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PDMA Service Selection Control Register 1 (PDMA_PDSSR1)
Register
PDMA_PDSSR1
Bits
[31:28]
[27:24]
[23:16]
[15:12]
[11:8]
[7:4]
31
23
15
7
NuMicro™ NUC130/NUC140 Technical Reference Manual
Descriptions
Reserved
ADC_RXSEL
Reserved
UART1_TXSEL
UART1_RXSEL
UART0_TXSEL
Address
PDMA_BA_GCR+0x08 R/W
30
22
14
6
UART1_TXSEL
UART0_TXSEL
Reserved
Reserved
PDMA ADC RX Selection
This filed defines which PDMA channel is connected to the on-chip peripheral ADC
RX. Software can configure the RX channel setting by ADC_RXSEL. The channel
configuration is the same as UART0_RXSEL field. Please refer to the explanation of
UART0_RXSEL
Reserved
PDMA UART1 TX Selection
This filed defines which PDMA channel is connected to the on-chip peripheral UART1
TX. Software can configure the TX channel setting by UART1_TXSEL. The channel
configuration is the same as UART0_RXSEL field. Please refer to the explanation of
UART0_RXSEL
PDMA UART1 RX Selection
This filed defines which PDMA channel is connected to the on-chip peripheral UART1
RX. Software can configure the RX channel setting by UART1_RXSEL. The channel
configuration is the same as UART0_RXSEL field. Please refer to the explanation of
UART0_RXSEL
PDMA UART0 TX Selection
This filed defines which PDMA channel is connected to the on-chip peripheral UART0
TX. Software can configure the TX channel setting by UART0_TXSEL. The channel
configuration is the same as UART0_RXSEL field. Please refer to the explanation of
UART0_RXSEL
29
21
13
5
R/W
Description
PDMA Service Selection Control Register 1
28
20
12
4
- 516 -
Reserved
27
19
11
3
Publication Release Date: June 14, 2011
26
18
10
2
UART1_RXSEL
UART0_RXSEL
ADC_RXSEL
25
17
9
1
Revision V2.01
Reset Value
0xFFFF_FFFF
24
16
8
0
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