STEVAL-PCC010V2 STMicroelectronics, STEVAL-PCC010V2 Datasheet - Page 127

• Manufacturer Part Number: STEVAL-PCC010V2
• Description: BOARD EVAL FOR ST802RT1A
• Manufacturer: STMicroelectronics
• Series: -r

Specifications of STEVAL-PCC010V2

• Design Resources: STEVAL-PCC010V2 BOM STEVAL-PCC010V2 Schematic
• Main Purpose: Interface, Ethernet Controller (PHY and MAC)
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: ST802RT1A, STM32F207
• Primary Attributes: 1 Port, 100BASE-TX/10BASE-T
• Secondary Attributes: MII, RMII
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-11465

STM32F205xx, STM32F207xx
Figure 60. Synchronous non-multiplexed NOR/PSRAM read timings
Table 73.
1. C
2. Preliminary values.
t
t
t
t
t
t
t
t
t
t
t
t
t
w(CLK)
d(CLKL-NExL)
d(CLKL-NExH)
d(CLKL-NADVL)
d(CLKL-NADVH)
d(CLKL-AV)
d(CLKL-AIV)
d(CLKL-NOEL)
d(CLKL-NOEH)
su(DV-CLKH)
h(CLKH-DV)
su(NWAITV-CLKH)
h(CLKH-NWAITV)
Symbol
L
= 15 pF.
Synchronous non-multiplexed NOR/PSRAM read timings
FSMC_CLK period
FSMC_CLK low to FSMC_NEx low (x = 0...2)
FSMC_CLK low to FSMC_NEx high (x = 0...2)
FSMC_CLK low to FSMC_NADV low
FSMC_CLK low to FSMC_NADV high
FSMC_CLK low to FSMC_Ax valid (x = 0...25)
FSMC_CLK low to FSMC_Ax invalid (x = 0...25)
FSMC_CLK low to FSMC_NOE low
FSMC_CLK low to FSMC_NOE high
FSMC_D[15:0] valid data before FSMC_CLK high
FSMC_D[15:0] valid data after FSMC_CLK high
FSMC_NWAIT valid before FSMC_SMCLK high
FSMC_NWAIT valid after FSMC_CLK high
Doc ID 15818 Rev 6
Parameter
T
T
T
HCLK
HCLK
HCLK
Electrical characteristics
16.6
Min
6.5
5
7
7
2
+ 1.5
+ 2
+ 4
(1)(2)
T
HCLK
Max
1.5
4
0
+ 1.5 ns
127/163
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns