FC-255 32.7680K-A0 Epson, FC-255 32.7680K-A0 Datasheet - Page 9

• Manufacturer Part Number: FC-255 32.7680K-A0
• Manufacturer: Epson

Specifications of FC-255 32.7680K-A0

• Lead Free Status / Rohs Status: Compliant

Functions of Pins
Pin Name
XRES
TEST
DIO1
DIO2
XOE
CPV
SHL
IPC
I/O
I/O
1
I
I
I
I
I
Vertical shift clock input pin
Pin for selecting the shift direction and for switching the I/O function of
the shift data I/O pin
Output enable pin
Reset pin
Test pin
Built-in power control pin
Shift data input/output pins
The vertical shift clock is the shift clock in the shift register. Data shift,
synchronizing with the rising-edge of this shift clock.
These are data I/O pins to and from the shift registers. When data
are input, they are captured, synchronizing with the rising-edge of
CPV, and data are output, synchronizing with the falling edge.
level is always "V
This pin selects the shift direction and switches I/O of the shift data
I/O pins.
This is a pin that controls the gate output pins (O1 - O240).
Setting XRES = "V
output voltage is set to the "V
Fix this pin to the "V
Fix this pin to the "V
I/O of DIO1 and DIO2 is switched by the level set by SHL. The output
XOE="V
XOE="V
SHL
V
V
CC
SS
CC
SS
" : Normal output status
O1
O1
" : V
CC
OFF
SS
"-"V
EE
EE
" resets data in all the shift registers. The gate
voltage output
" level.
" level.
EPSON
SS
Gate Output
."
Function
OFF
" level.
O240
O240
Output Input
DIO1
Input Output
SED1797 D
DIO2
Number
of Pins
1
2
1
1
1
1
1
0B
Series
7