LT6660KCDC-3.3#PBF Linear Technology, LT6660KCDC-3.3#PBF Datasheet - Page 11
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LT6660KCDC-3.3#PBF
Manufacturer Part Number
LT6660KCDC-3.3#PBF
Description
Manufacturer
Linear Technology
Datasheet
1.LT6660KCDC-3.3PBF.pdf
(12 pages)
Specifications of LT6660KCDC-3.3#PBF
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
3
Mounting
Surface Mount
Package Type
DFN EP
Case Length
2mm
Screening Level
Commercial
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
PACKAGE DESCRIPTIO
2.00 ±0.05
1.30 ±0.05
(SEE NOTE 6)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
TOP MARK
PIN 1 BAR
1.00 ±0.05
(2 SIDES)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
0.200 REF
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (W-TBD)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
U
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
TOP AND BOTTOM OF PACKAGE
1.35 ±0.05
(Reference LTC DWG # 05-08-1717 Rev Ø)
(2 SIDES)
3-Lead Plastic DFN (2mm × 2mm)
0.50 BSC
0.00 – 0.05
0.75 ±0.05
0.25 ± 0.05
2.00 ±0.10
DC Package
(4 SIDES)
PACKAGE
OUTLINE
1.00 ± 0.05
0.40 ±0.05
0.70 ±0.05
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
1.35 ± 0.05
(2 SIDES)
3
1
0.50 BSC
(DC3) DFN 1205 REV Ø
0.25 ± 0.05
R = 0.05
TYP
R = 0.115 TYP
PIN 1 NOTCH
R = 0.20 OR
0.25 × 45°
CHAMFER
LT6660
11
6660fa