DS2155LC2+ Maxim Integrated Products, DS2155LC2+ Datasheet - Page 181
DS2155LC2+
Manufacturer Part Number
DS2155LC2+
Description
IC TXRX T1/E1/J1 SGL 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.DS2155L.pdf
(238 pages)
Specifications of DS2155LC2+
Function
Single-Chip Transceiver
Interface
E1, HDLC, J1, T1
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 3/Error-Insertion Rate Select Bits (ER0 to ER3)
Bit 4/Constant Errors (CE). When this bit is set high (and the ER0 to ER3 bits are not set to 0000), the error-
insertion logic ignores the number-of-error registers (NOE1, NOE2) and generates errors constantly at the selected
insertion rate. When CE is set to 0, the NOEx registers determine how many errors are to be inserted.
Bits 5, 6/Unused, must be set to 0 for proper operation
Bit 7/Write NOE Registers (WNOE). If the host wishes to update to the NOEx registers, this bit must be toggled
from a 0 to a 1 after the host has already loaded the prescribed error count into the NOEx registers. The toggling of
this bit causes the error count loaded into the NOEx registers to be loaded into the error-insertion circuitry on the
next clock cycle. Subsequent updates require that the WNOE bit be set to 0 and then 1 once again.
ER3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
ER2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
WNOE
7
0
ER1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
ER0
—
ERC
Error-Rate Control Register
EBh
6
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
No errors inserted
1 in 16
1 in 32
1 in 64
1 in 128
1 in 256
1 in 512
1 in 1024
1 in 2048
1 in 4096
1 in 8192
1 in 16,384
1 in 32,768
1 in 65,536
1 in 131,072
1 in 262,144
—
Error Rate
5
0
CE
4
0
181 of 238
ER3
3
0
ER2
2
0
ER1
1
0
ER0
0
0
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