DS21354LN+ Maxim Integrated Products, DS21354LN+ Datasheet - Page 23
DS21354LN+
Manufacturer Part Number
DS21354LN+
Description
IC TXRX E1 1-CHIP 3.3V 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.DS2154LNA2.pdf
(124 pages)
Specifications of DS21354LN+
Function
Single-Chip Transceiver
Interface
E1, HDLC
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
Remote and AIS Alarm Detector / Generator
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
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3.1.6.
Signal Name:
Signal Description:
Signal Type:
A 2.048MHz (±50ppm) clock source with TTL levels is applied at this pin. This clock is used internally
for both clock/data recovery and for jitter attenuation. A quartz crystal of 2.048MHz may be applied
across MCLK and XTALD instead of the TTL level clock source.
Signal Name:
Signal Description:
Signal Type:
A quartz crystal of 2.048MHz may be applied across MCLK and XTALD instead of a TTL level clock
source at MCLK. Leave open circuited if a TTL clock source is applied at MCLK.
Signal Name:
Signal Description:
Signal Type:
A 16.384MHz clock that is frequency locked to the 2.048MHz clock provided from the clock/data
recovery block (if the jitter attenuator is enabled on the receive side) or from the TCLKI pin (if the jitter
attenuator is enabled on the transmit side). Can be internally disabled via TEST2 register if not needed.
Signal Name:
Signal Description:
Signal Type:
Tie low to separate the line interface circuitry from the framer/formatter circuitry and activate the
TPOSI/TNEGI/TCLKI/RPOSI/RNEGI/RCLKI pins. Tie high to connect the line interface circuitry to the
framer/formatter circuitry and deactivate the TPOSI/TNEGI/TCLKI/RPOSI/RNEGI/RCLKI pins. When
LIUC is tied high, the TPOSI/TNEGI/TCLKI/ RPOSI/RNEGI/RCLKI pins should be tied low.
Signal Name:
Signal Description:
Signal Type:
Analog inputs for clock recovery circuitry. These pins connect via a 1:1 transformer to the E1 line. See
Section
Signal Name:
Signal Description:
Signal Type:
Analog line-driver outputs. These pins connect via a step-up transformer to the E1 line. See Section
for details.
15
for details.
Line Interface Pins
MCLK
Master Clock Input
Input
XTALD
Quartz Crystal Driver
Output
8XCLK
Eight-Times Clock
Output
LIUC
Line Interface Connect
Input
RTIP and RRING
Receive Tip and Ring
Input
TTIP and TRING
Transmit Tip and Ring
Output
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