MC34118DW Freescale Semiconductor, MC34118DW Datasheet - Page 5

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MC34118DW

Manufacturer Part Number
MC34118DW
Description
IC VOICE SWITCH SPKPHONE 28-SOIC
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC34118DW

Function
Voice-Switched Speakerphone
Number Of Circuits
1
Voltage - Supply
3.5 V ~ 6.5 V
Current - Supply
5.5mA
Operating Temperature
-20°C ~ 60°C
Mounting Type
Surface Mount
Package / Case
*
Includes
Background Noise Monitor, Chip Disable, Dial Tone Detector, Driver Amplifiers, Level Detectors, Microphone Amplifier, MUTE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power (watts)
-
Interface
-

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MOTOROLA
Pin
10
11
12
1
2
3
4
5
6
7
8
9
Name
HTO+
HTO--
MCO
TXO
MUT
V
MCI
HTI
CD
TXI
FO
FI
CC
Filter output. Output impedance is less than
50 ohms.
Filter input. Input impedance is greater than
1.0 Mohm.
Chip Disable. A logic low (< 0.8 V) sets normal
operation. A logic high (> 2.0 V) disables the
IC to conserve power. Input impedance is
nominally 90 kΩ.
A supply voltage of + 2.8 to + 6.5 volts is
required, at ≈5.0 mA. As V
2.8 volts, an AGC circuit reduces the receive
attenuator gain by ≈25 dB (when in the
receive mode).
Output of the second hybrid amplifier. The
gain is internally set at -- 1.0 to provide a
differential output, in conjunction with HTO--,
to the hybrid transformer.
Output of the first hybrid amplifier. The gain of
the amp is set by external resistors.
Input and summing node for the first hybrid
amplifier. DC level is ≈V
Output of the transmit attenuator. DC level is
approximately V
Input to the transmit attenuator. Max. signal
level is 350 mVrms. Input impedance is
≈10 kΩ.
Output of the microphone amplifier. The gain
of the amplifier is set by external resistors.
Input and summing node of the microphone
amplifier. DC level is ≈V
Mute input. A logic low (< 0.8 V) sets normal
operation. A logic high (> 2.0 V) mutes the
microphone amplifier without affecting the rest
of the circuit. Input impedance is nominally
90 kΩ.
B
Description
.
B
B
.
.
CC
falls from 3.5 to
PIN DESCRIPTION
NOTE: Pin numbers are identical for the DIP package and the SOIC
Pin
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
package.
Name
RLO2
RLO1
TLO2
TLO1
RLI2
RXO
RLI1
CPR
GND
VLC
CPT
TLI2
TLI1
RXI
C
V
B
T
Volume control input. When VLC = V
receive attenuator is at maximum gain when
in the receive mode. When VLC = 0.3 V
receive gain is down 35 dB. Does not affect
the transmit mode.
An RC at this pin sets the response time for
the circuit to switch modes.
An output voltage ≈V
system ac ground, and biases the volume
control. A filter cap is required.
An RC at this pin sets the time constant for
the transmit background monitor.
Input to the transmit level detector on the
mike/speaker side.
Output of the transmit level detector on the
mike/speaker side, and input to the transmit
background monitor.
Output of the receive level detector on the
mike/speaker side.
Input to the receive level detector on the
mike/speaker side.
Input to the receive attenuator and dial tone
detector. Max input level is 350 mV RMS.
Input impedance is ≈10 kΩ.
Output of the receive attenuator. DC level is
approximately V
Input to the transmit level detector on the line
side.
Output of the transmit level detector on the
line side.
Output of the receive level detector on the line
side, and input to the receive background
monitor.
Input to the receive level detector on the line
side.
An RC at this pin sets the time constant for
the receive background monitor.
Ground pin for the entire IC.
B
Description
.
CC
/2. This voltage is a
MC34118
B
, the
B
, the
5

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