LTC6360CMS8E#PBF Linear Technology, LTC6360CMS8E#PBF Datasheet - Page 17

• Manufacturer Part Number: LTC6360CMS8E#PBF
• Manufacturer: Linear Technology

Specifications of LTC6360CMS8E#PBF

• Lead Free Status / Rohs Status: Supplier Unconfirmed

applicaTions inForMaTion
Lower value gain and feedback resistors, R
result in lower output noise at the expense of increased
distortion due to increased loading of the amplifier.
External loading should not be less than 2kΩ to avoid de-
grading distortion performance. When using R
R
bypassing with a small capacitor across R
Using a single pole passive RC filter network at the output
of the LTC6360 reduces the output noise bandwidth and
thereby increases the signal to noise ratio of the system.
For example, in a typical system with an output sig-
nal of 4V
C
57µV (250MHz –3dB bandwidth at OUT) to 27µV (48MHz
–3dB bandwidth) and improve the SNR from 90dB to 97dB.
Keep in mind that long RC time constants in the output
filter can increase the settling time at the inputs of the
ADC. Incomplete settling can cause gain errors or increase
apparent crosstalk in multiplexed systems.
Board Layout and Bypass Capacitors/DC1639A
Demoboard
It is recommended that a high quality X5R or X7R, 0.1μF
bypass capacitor be placed directly between the V
the GND pin; the GND pin (exposed pad) should be tied
directly to a low impedance ground plane with minimal
FILT
F
||R
G
= 330pF will reduce the total integrated noise from
, wideband noise can be substantially reduced by
P-P
, an RC output filter with R
FILT
F
.
G
and R
= 10Ω and
S
equal to
CC
F
, will
and
routing. The CPI pin can be filtered with several high qual-
ity X5R or X7R capacitors returned to GND with minimal
trace routing. Small geometry (e.g., 0603) surface mount
ceramic capacitors have a much higher self resonant
frequency than do leaded capacitors, and perform best
with the LTC6360.
Stray parasitic capacitance at the –IN pin should be kept
to a minimum to prevent degraded stability response re-
sulting in excessive ringing or oscillations. Traces at –IN
should be kept as short as possible, and any ground plane
should be stripped from under the pin and trace.
The RC filter network at the output serves both as a filter
and compensation network. Parasitic trace inductance
in this path will tend to destabilize the amplifier. The RC
filter network at the output should return directly to a
low impedance ground plane and trace routing should be
minimized in this path. A high quality COG/NPO surface
mount capacitor should be used to optimize distortion
performance and reduce destabilizing series resistance and
inductance. When large filter capacitor values are required,
multiple surface mount capacitors may be necessary with
the smallest-valued capacitor placed closest to the output.
The DC1639A demoboard has been designed for the evalu-
ation of the LTC6360 following the above layout practices.
Its schematic and layout are shown in Figures 10 and 11.
LTC6360
17
6360f