LMH6521SQ/NOPB National Semiconductor, LMH6521SQ/NOPB Datasheet - Page 4

• Manufacturer Part Number: LMH6521SQ/NOPB
• Manufacturer: National Semiconductor

Specifications of LMH6521SQ/NOPB

• Lead Free Status / Rohs Status: Compliant

www.national.com
Power Requirements
VCC
ICC
ICC
All Digital Inputs
VIL
VIH
IIH
IIL
Parallel and Pulse Mode Timing
t
t
t
t
t
t
Serial Mode Timing and AC Characteristics
SPI Compatible
f
t
t
t
t
t
t
t
GS
GH
LP
PG
PW
RW
SCLK
PH
PL
SU
H
OZD
OD
CSS
Symbol
Gain Accuracy
Gain Step Size
Channel Gain Matching
Channel Phase Matching
Cumulative Gain Error
Cumulative Phase Shift
Gain Step Switching Time
Gain Temperature Sensitivity
Supply Voltage
Supply Current
Disabled Supply Current
Logic Compatibility
Logic Input Low Voltage
Logic Input High Voltage
Logic Input High Input Current
Logic Input Low Input Current
Setup Time
Hold Time
Latch Low Pulse Width
Pulse Gap between Pulses
Minimum Pulse Width
Reset Width
Max Serial Clock Frequency
SCLK High State Duty Cycle
SCLK Low State Duty Cycle
Serial Data In Setup Time
Serial Data In Hold Time
Serial Data Out TRI-STATE-to-
Driven Time
Serial Data Out Output Delay Time Referenced to Negative edge of SCLK
Serial Chip Select Setup Time
Parameter
ChA - ChB, any gain setting
0 to 12 dB attenuation setting
0 to 24 dB attenuation setting
0 to 31 dB attenuation setting
0 to 12 dB attenuation setting
0 to 24 dB attenuation setting
0 to 31 dB attenuation setting
0 attenuation setting
Both Channels Enabled
Both Channels
TTL, 2.5V CMOS, 3.3V CMOS
Digital Input Voltage = 5V
Digital Input Voltage = 0V
Pulse Mode
% of SCLK Period
% of SCLK Period
Referenced to Negative edge of SCLK
Referenced to Positive edge of SCLK
Conditions
4
(Note
4.75
Min
6)
(Note
±0.04
±0.45
±16.5
±0.1
±0.3
±0.5
±0.6
±5.3
Typ
225
200
–60
0.5
2.7
5.0
0.5
1.8
15
35
20
15
10
50
50
50
10
10
1
3
3
7
2
2
5
5)
(Note
Max
5.25
245
6)
degrees
degrees
degrees
degrees
mdB/°C
Units
MHz
mA
mA
dB
dB
dB
dB
dB
μA
μA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
%
V
V
V