ATA5830N-PNQW Atmel, ATA5830N-PNQW Datasheet - Page 16

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ATA5830N-PNQW

Manufacturer Part Number
ATA5830N-PNQW
Description
Manufacturer
Atmel
Datasheet

Specifications of ATA5830N-PNQW

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3. Hardware Description
3.1
Figure 3-1.
16
SPDT_ANT
ANT_TUNE
SPDT_RX
SPDT_TX
RFIN_HB
RFIN_LB
Overview
RFOUT
VS_PA
Atmel ATA5830/ATA5830N
System Block Diagram
RF Frontend
LNA, Mixer
Damping
Amplifier
Antenna
Tuning
SPDT
Power
Figure 3-1
In RXMode the crystal oscillator (XTO) together with the fractional-N PLL generates the local
oscillator (LO) signal.The RF signal coming either from the lowband input (RFIN_LB) or high-
band input (RFIN_HB) is amplified by the low noise amplifier (LNA) and downconverted by the
mixer to the intermediate frequency (IF) using the LO signal. Afterwards the IF signal is sam-
pled using a high resolution analog to digital converter (ADC). Within the RX digital signal
processing (RxDSP) the received signal from the ADC is filtered by a digital channel filter and
demodulated. Two data receive paths are included into the RxDSP after the digital channel fil-
ter. The receive path can also be configured to provide the digital output of an internal
temperature sensor (Temp( )).
XTAL1
RF Frontend
Fractional
Temp ( )
Control
N-PLL
ADC
XTO
shows the system block diagram of Atmel
XTAL2
Modulator
Rx DSP
Tx DSP
SSI
PB (0 to 7)
SRC, FRC
Oscillators
Watchdog
Port B (8)
Timers
Timers
Timer
16 Bit
8 Bit
IRQ
3x
2x
AVCC
®
ATA5830.
Management
ROM
DATA BUS
Power
Clock
Man.
CRC
SPI
VS
NVM Controller
DVCC
AVR CPU
Flash
PC (0 to 5)
Port C (6)
Debug
EEPROM
SRAM
Wire
9208DS–RKE–07/11

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