AD7887ARM-REEL Analog Devices Inc, AD7887ARM-REEL Datasheet
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AD7887ARM-REEL
Related parts for AD7887ARM-REEL
AD7887ARM-REEL Summary of contents
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... Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. ...
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AD7887 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Specifications .................................................................. 5 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Pin ...
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SPECIFICATIONS 2.5 V, external/internal reference unless otherwise noted REF Table 1. Parameter DYNAMIC PERFORMANCE 2, 3 Signal to Noise + Distortion Ratio (SNR) 2 Total Harmonic Distortion (THD) 2 ...
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AD7887 Parameter CONVERSION RATE Throughput Time 2 Track/Hold Acquisition Time Conversion Time POWER REQUIREMENTS Normal Mode (Mode 2) Static Operational (f = 125 kSPS) SAMPLE Using Standby Mode (Mode 4) Using Shutdown Mode (Modes 1, ...
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TIMING SPECIFICATIONS Table 2. Limit at T (A, B Versions) Parameter 4. 5. SCLK t 14.5 × t CONVERT SCLK t 1.5 × t ACQ SCLK ...
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AD7887 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter V to AGND DD Analog Input Voltage to AGND Digital Input Voltage to AGND Digital Output Voltage to AGND REF /REF to AGND IN OUT Input ...
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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS CS 1 AD7887 GND 3 TOP VIEW (Not to Scale) AIN1/V 4 REF Figure 3. SOIC_N Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 CS Chip Select. Active ...
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AD7887 TYPICAL PERFORMANCE CHARACTERISTICS 0 –10 –30 –50 –70 –90 –110 Figure 5. Dynamic Performance 73 EXT REFERENCE 72.5 72.0 71.5 71.0 0.15 10.89 21.14 INPUT FREQUENCY (kHz) Figure 6. SNR vs. Input Frequency 4096 POINT FFT SAMPLING ...
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TERMINOLOGY Integral Nonlinearity This is the maximum deviation from a straight line passing through the endpoints of the ADC transfer function. The end- points of the transfer function are zero scale, a point ½ LSB below the first code transition, ...
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AD7887 CONTROL REGISTER The control register on the AD7887 is an 8-bit, write-only register. Data is loaded from the DIN pin of the AD7887 on the rising edge of SCLK. The data is transferred on the DIN line at the ...
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THEORY OF OPERATION CIRCUIT INFORMATION The AD7887 is a fast, low power, 12-bit, single-supply, single- channel/dual-channel ADC. The part can be operated from (2 3.6 V) supply or from (4. ...
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AD7887 ANALOG INPUT Figure 12 shows an equivalent circuit of the analog input structure of the AD7887. The two diodes, D1 and D2, provide ESD protection for the analog inputs. Care must be taken to ensure that the analog input ...
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POWER-DOWN OPTIONS The AD7887 provides flexible power management to allow the user to achieve the best power performance for a given throughput rate. The power management options are selected by programming the power management bits (that is, PM1 and PM0) ...
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AD7887 second conversion can put the part back into Mode 1, and the part goes into power-down mode when CS returns high. Mode 2 (PM1 = 0, PM0 = 1) In this mode of operation, the AD7887 remains fully powered ...
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THE PART POWERS FALLING EDGE AS PM1 AND PM0 = SCLK FOUR LEADING ZEROS + CONVERSION RESULT DOUT DIN DATA IN CONTROL REGISTER DATA IS LOADED ON THE FIRST EIGHT CLOCKS. PM1 AND PM0 ...
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AD7887 THE PART ENTERS SHUTDOWN AT THE END OF CONVERSION AS PM1 = 1 AND PM0 = SCLK FOUR LEADING ZEROS + CONVERSION RESULT DOUT DATA IN DIN CONTROL REGISTER DATA IS LOADED ON THE FIRST EIGHT ...
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SERIAL INTERFACE Figure 21 shows the detailed timing diagrams for serial interfacing to the AD7887. The serial clock provides the conversion clock and also controls the transfer of information to and from the AD7887 during conversion. CS initiates the data ...
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AD7887 MICROPROCESSOR INTERFACING The serial interface on the AD7887 allows the part to be directly connected to a range of many different microprocessors. This section explains how to interface the AD7887 with some of the more common microcontroller and DSP ...
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AD7887 to MC68HC11 The serial peripheral interface (SPI) on the MC68HC11 is configured for master mode (MSTR = 1) when the clock polarity bit (CPOL and the clock phase bit (CPHA The SPI is configured by ...
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... PC via the EVAL-CONTROL BOARD. The EVAL-CONTROL BOARD can be used in conjunction with the AD7887 evaluation board, as well as many other Analog Devices, Inc., evaluation boards ending in the CB designator, to demonstrate/evaluate the ac and dc performance of the AD7887. ...
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... Dimensions shown in millimeters and (inches) ORDERING GUIDE Model Linearity Error (LSB) AD7887AR ±2 AD7887AR-REEL ±2 AD7887AR-REEL7 ±2 AD7887ARZ 2 ±2 2 AD7887ARZ-REEL ±2 AD7887ARZ-REEL7 2 ±2 AD7887ARM ±2 AD7887ARM-REEL ±2 AD7887ARM-REEL7 ±2 2 AD7887ARMZ ±2 2 AD7887ARMZ-REEL ±2 2 AD7887ARMZ-REEL7 ±2 AD7887BR ±1 AD7887BR-REEL ±1 AD7887BR-REEL7 ±1 2 AD7887BRZ ±1 AD7887BRZ-REEL 2 ±1 ...
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AD7887 NOTES Rev Page ...
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NOTES Rev Page AD7887 ...
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... AD7887 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C06191-0-9/06(C) Rev Page ...