CDP6402CE Harris Corporation, CDP6402CE Datasheet

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CDP6402CE

Manufacturer Part Number
CDP6402CE
Description
CMOS universal asynchronous receiver/transmitter (UART), 5V, 200K baud
Manufacturer
Harris Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CDP6402CE
Manufacturer:
N/A
Quantity:
900
Part Number:
CDP6402CE
Quantity:
200
Part Number:
CDP6402CEX
Quantity:
200
August 1996
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
Features
• Low Power CMOS Circuitry. . . . . . . . . . 7.5mW (Typ) at
• Baud Rate
• 4V to 10.5 Operation
• Automatic Data Formatting and Status Generation
• Fully Programmable with Externally Selectable Word
• Operating Temperature Range
• Replaces Industry Type IM6402 and Compatible with
Ordering Information
Pinout
PDIP
SBDIP
- DC to 200K Bits/s (Max) at. . . . . . . . . . . . . . 5V, 85
- DC to 400K Bits/s (Max) at. . . . . . . . . . . . . . 10V, 85
Length (5 - 8 Bits), Parity Inhibit, Even/Odd Parity, and
1, 1-1/2, or 2 Stop Bits
- CDP6402D, CD . . . . . . . . . . . . . . . . . -55
- CDP6402E, CE . . . . . . . . . . . . . . . . . . -40
HD6402
PACK-
Burn-In
Burn-In
AGE
©
Harris Corporation 1996
S E M I C O N D U C T O R
TEMP. RANGE
-40
-40
o
o
C to +85
C to +85
o
o
C
C
3.2MHz (Max Freq.) at V
CDP6402CE
CDP6402CEX
CDP6402CD
CDP6402CDX CDP6402DX
5V/200K
BAUD
CDP6402E
CDP6402D
10V/400K
BAUD
RBR8
RBR7
RBR6
RBR5
RBR4
RBR3
RBR2
RBR1
GND
RRD
RRC
DRR
o
SFD
-
V
RRI
NC
OE
DR
PE
FE
C to +125
o
DD
C to +85
(40 LEAD PDIP, SBDIP)
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
DD
E40.6
D40.6
PKG.
NO.
= 5V
TOP VIEW
o
o
o
o
C
C
C
C
5-74
Description
The CDP6402 and CDP6402C are silicon gate CMOS
Universal
circuits for interfacing computers or microprocessors to
asynchronous serial data channels. They are designed to
provide the necessary formatting and control for interfacing
between serial and parallel data channels. The receiver
converts serial start, data, parity, and stop bits to parallel
data verifying proper code transmission, parity and stop bits.
The transmitter converts parallel data into serial form and
automatically adds start parity and stop bits.
The data word can be 5, 6, 7 or 8 bits in length. Parity may
be odd, even or inhibited. Stop bits can be 1, 1-1/2, or 2
(when transmitting 5-bit code).
The CDP6402 and CDP6402C can be used in a wide range
of applications including modems, printers, peripherals,
video terminals, remote data acquisition systems, and serial
data links for distributed processing systems.
The CDP6402 and CDP6402C are functionally identical.
They differ in that the CDP6402 has a recommended
operating voltage range of 4V to 10.5V, and the CDP6402C
has a recommended operating voltage range of 4V to 6.5V.
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
CMOS Universal Asynchronous
Asynchronous
TRC
EPE
CLS1
CLS2
SBS
PI
CRL
TBR8
TBR7
TBR6
TBR5
TBR4
TBR3
TBR2
TBR1
TRO
TRE
TBRL
TBRE
MR
Receiver/Transmitter (UART)
CDP6402C
CDP6402,
Receiver/Transmitter
File Number
(UART)
1328.2

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CDP6402CE Summary of contents

Page 1

... HD6402 Ordering Information PACK- 5V/200K AGE TEMP. RANGE BAUD o o PDIP - +85 C CDP6402CE Burn-In CDP6402CEX o o SBDIP - +85 C CDP6402CD Burn-In CDP6402CDX CDP6402DX Pinout CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. © Copyright Harris Corporation 1996 ...

Page 2

TRE TBRL TRANSMITTER STOP TIMING TRC AND CONTROL CLS1 CLS2 CRL MR RRC RECEIVER TIMING AND DRR CONTROL STOP LOGIC SFD DR OE TBRE FE CDP6402, CDP6402C TBR8 (MSB) TRANSMITTER BUFFER REGISTER PARITY LOGIC TRANSMITTER REGISTER MULTIPLEXER CONTROL REGISTER MULTIPLEXER ...

Page 3

Absolute Maximum Ratings DC Supply-Voltage Range CDP6402 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

Static Electrical Specifications at T CONDITIONS V O PARAMETER (V) Input High Voltage V 0.5, 4.5 IH 0.5, 9.5 Input Leakage I Any IN Current Input Three-State Output OUT Leakage Current 0, 10 Operating Current I - ...

Page 5

Description of Operation Initialization and Controls A positive pulse on the MASTER RESET (MR) input resets the control, status, and receiver buffer registers, and sets the serial output (TRO) High. Timing is generated from the clock inputs RRC and TRC ...

Page 6

CONTROL WORD CLS2 CLS1 ...

Page 7

PIN SYMBOL 1 V Positive Power Supply DD 2 N/C No Connection 3 GND Ground ( RRD A high level on RECEIVER REGISTER DISABLE forces the receiver holding register ouputs RBR1-RBR8 to a high impedance state. 5 ...

Page 8

TABLE 2. FUNCTION PIN DEFINITION (Continued) PIN SYMBOL 25 TRO Character data, start data and stop bits appear serially at the TRANSMITTER REGISTER OUTPUT. 26 TBR1 Character data is loaded into the TRANSMITTER BUFFER REGISTER via inputs TBR1-TBR8. For character ...

Page 9

Dynamic Electrical Specifications (NOTE 1) PARAMETER SYSTEM TIMING (See Figure 6) Minimum Pulse Width CRL Minimum Setup Time Control Word to CRL Minimum Hold Time Control Word after CRL Propagation Delay Time SFD High to SOD SFD Low to SOD ...

Page 10

Dynamic Electrical Specifications (NOTE 1) PARAMETER TRANSMITTER TIMING (See Figure 7) Minimum Clock Period (TRC) Minimum Pulse Width Clock Low Level Clock High Level TBRL Minimum Setup Time TBRL to Clock Data to TBRL Minimum Hold-Time Data after TBRL Propagation ...

Page 11

TRC t THC TBRL t THTH TRO t TTHR TBRE TRE t T BUS 0 T BUS 7 NOTES: 1. The holding register is loaded on the trailing edge of TBRL. 2. The transmitter shift register, ...

Page 12

Dynamic Electrical Specifications (NOTE 1) PARAMETERS RECEIVER TIMING (See Figure 8) Minimum Clock Period (RRC) Minimum Pulse Width Clock Low Level Clock High Level Data Received Reset Minimum Setup Time Data Start Bit to Clock Propagation Delay Time Data Received ...

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