74LS373 Motorola, 74LS373 Datasheet

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74LS373

Manufacturer Part Number
74LS373
Description
Manufacturer
Motorola
Datasheet

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OCTAL TRANSPARENT LATCH
WITH 3-STATE OUTPUTS;
OCTAL D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUT
organized system applications. The flip-flops appear transparent to the data
(data changes asynchronously) when Latch Enable (LE) is HIGH. When LE is
LOW, the data that meets the setup times is latched. Data appears on the bus
when the Output Enable (OE) is LOW. When OE is HIGH the bus output is in
the high impedance state.
turing separate D-type inputs for each flip-flop and 3-state outputs for bus ori-
ented applications. A buffered Clock (CP) and Output Enable (OE) is common
to all flip-flops. The SN54 / 74LS374 is manufactured using advanced Low
Power Schottky technology and is compatible with all Motorola TTL families.
NOTES:
a) 1 TTL Units Load (U.L.) = 40 A HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 7.5 U.L. for Military (54) and 25 U.L. for Commercial
PIN NAMES
D 0 – D 7
LE
CP
OE
O 0 – O 7
(74) Temperature Ranges. The Output HIGH drive factor is 25 U.L. for Military (54) and
The SN54 / 74LS373 consists of eight latches with 3-state outputs for bus
The SN54 / 74LS374 is a high-speed, low-power Octal D-type Flip-Flop fea-
Eight Latches in a Single Package
3-State Outputs for Bus Interfacing
Hysteresis on Latch Enable
Edge-Triggered D-Type Inputs
Buffered Positive Edge-Triggered Clock
Hysteresis on Clock Input to Improve Noise Margin
Input Clamp Diodes Limit High Speed Termination Effects
65 U.L. for Commercial (74) Temperature Ranges.
V CC
OE
20
1
O 7
O 0
19
2
Data Inputs
Latch Enable (Active HIGH) Input
Clock (Active HIGH going edge) Input
Output Enable (Active LOW) Input
Outputs (Note b)
D 0
D 7
18
3
D 6
17
D 1
SN54 / 74LS373
4
O 6
O 1
16
5
O 5
O 2
15
6
D 5
14
D 2
7
D 4
13
D 3
8
CONNECTION DIAGRAM DIP (TOP VIEW)
O 4
12
O 3
9
GND
LE
11
10
FAST AND LS TTL DATA
65 (25) U.L.
HIGH
LOADING (Note a)
0.5 U.L.
0.5 U.L.
0.5 U.L.
0.5 U.L.
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
5-521
15 (7.5) U.L.
LOW
0.25 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
V CC
OE
20
1
O 0
O 7
19
2
20
20
OCTAL TRANSPARENT LATCH
D 0
D 7
18
3
1
20
OCTAL D-TYPE FLIP-FLOP
SN54/74LS373
SN54/74LS374
WITH 3-STATE OUTPUTS;
1
ORDERING INFORMATION
WITH 3-STATE OUTPUT
LOW POWER SCHOTTKY
D 6
SN54 / 74LS374
17
D 1
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXDW SOIC
4
1
O 6
O 1
16
5
O 5
O 2
15
6
D 5
14
D 2
7
Ceramic
Plastic
D 4
13
D 3
CASE 751D-03
8
CASE 732-03
CASE 738-03
DW SUFFIX
CERAMIC
N SUFFIX
J SUFFIX
PLASTIC
O 4
SOIC
12
O 3
9
GND
CP
11
10

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74LS373 Summary of contents

Page 1

... WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT The SN54 / 74LS373 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the data (data changes asynchronously) when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Output Enable (OE) is LOW ...

Page 2

... SN54/74LS373 SN54/74LS374 LS373 HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance * Note: Contents of flip-flops unaffected by the state of the Output Enable input (OE). SN54LS / 74LS373 LATCH G G ENABLE SN54LS / 74LS374 GUARANTEED OPERATING RANGES Symbol Parameter V CC Supply Voltage T A Operating Ambient Temperature Range I OH Output Current — ...

Page 3

... SN54/74LS373 SN54/74LS374 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE Symbol Symbol Parameter Parameter V IH Input HIGH Voltage Input LOW Voltage Input LOW Voltage V IK Input Clamp Diode Voltage Output HIGH Voltage Output HIGH Voltage Output LOW Voltage Output LOW Voltage I OZH Output Off Current HIGH ...

Page 4

... D n OUTPUT OE 1 PZL t PLZ V OUT 1.3 V 0.5 V Figure SW1 TO OUTPUT UNDER TEST 5 SW2 * Includes Jig and Probe Capacitance. FAST AND LS TTL DATA SN54/74LS373 AC WAVEFORMS PLH t PHL Figure PZH 1 OUT 1 Figure 3 AC LOAD CIRCUIT SWITCH POSITIONS SYMBOL t PZH t PZL ...

Page 5

1.3 V 1 PLH t PHL OUTPUT 1.3 V Figure 5 OE 1 PZH t PHZ V ...

Page 6

0.25 (0.010 Case 732-03 J Suffix 20-Pin Ceramic Dual In-Line ...

Page 7

... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “ ...

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