DS1010-60 Dallas Semiconductor, DS1010-60 Datasheet
DS1010-60
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DS1010-60 Summary of contents
Page 1
... Fast turn prototypes DESCRIPTION The DS1010 series delay line has ten equally spaced taps providing delays from 500 ns. The devices are offered in a standard 14-pin DIP which is pin-compatible with hybrid delay lines. Alternatively, a 16-pin SOIC is available for surface mount technology which reduces PC board area. ...
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... LOGIC DIAGRAM Figure 1 PART NUMBER DELAY TABLE (t CATALOG P/N DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010-100 DS1010-125 DS1010-150 DS1010-175 DS1010-200 DS1010-250 DS1010-300 DS1010-350 DS1010-400 DS1010-450 DS1010-500 Custom delays available Table 1 PHL PLH TOTAL DELAY 100 125 150 175 200 250 300 350 400 ...
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... WI PLH t PLH t PHL t PU Period MIN (0°C to 70° 5.0V ± 5%) CC TYP MAX UNITS 5. 0.8 V 1.0 µA 40 150 mA -1 25° ± 5 TYP MAX UNITS ns Table 1 ns Table 1 ns 100 TYP MAX UNITS DS1010 NOTES NOTES 25°C) NOTES ...
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... CC whichever is greater. 4. See “Test Conditions” section. 5. For DS1010 delay lines with a TAP 10 delay of 100 ns or greater, temperature variations from may produce an additional input-to-tap delay shift of 2ns or 3%, whichever is greater. 6. For DS1010 delay lines with a TAP 10 delay less than 100 ns, temperature variations from may produce an additional input-to-tap delay shift 9%, whichever is greater ...
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... Delay, Falling): The elapsed time between the 1.5V point on the trailing edge of the input PHL pulse and the 1.5V point on the trailing edge of any tap output pulse DS1010 ...
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... TEST SETUP DESCRIPTION Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the DS1010. The input waveform is produced by a precision pulse generator under software control. Time delays are measured by a time interval counter (20 ps resolution) connected between the input and each tap. Each tap is selected and connected to the counter by a VHF switch control unit ...