MT9042CP Mitel, MT9042CP Datasheet
MT9042CP
Available stocks
Related parts for MT9042CP
MT9042CP Summary of contents
Page 1
... Control State Machine LOS2 MS1 MS2 Multitrunk System Synchronizer DS5144 MT9042CP Description The MT9042C Multitrunk System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9042C generates ST-BUS clock and framing signals that are phase locked to either a 2 ...
Page 2
MT9042C Pin Description Pin # Name 1,15 V Ground. 0 Volts TRST TIE Circuit Reset (TTL Input). A logic low at this input resets the Time Interval Error (TIE) correction circuit resulting in a re-alignment of input phase ...
Page 3
Advance Information Pin Description Pin # Name 16 C8o Clock 8.192MHz (CMOS Output). This output is used for ST-BUS operation at 8.192Mb/s. 17 C16o Clock 16.384MHz (CMOS Output). This output is used for ST-BUS operation at 16.384Mb GTi ...
Page 4
MT9042C Functional Description The MT9042C is a Multitrunk System Synchronizer, providing timing (clock) and synchronization (frame) signals to interface circuits for T1 and E1 Primary Rate Digital Transmission links. Figure functional block diagram which is described in ...
Page 5
Advance Information Virtual Reference Phase from Detector TIE Corrector Feedback Signal from Frequency Select MUX from Normal to Holdover. In Holdover Mode, the DPLL no longer uses the virtual reference signal, but generates an accurate clock signal using storage techniques. ...
Page 6
MT9042C Digitally Controlled Oscillator (DCO) - the DCO receives the limited and filtered signal from the Loop FIlter, and based on its value, generates a corresponding digital output synchronization method of the DCO is dependent on the state of the ...
Page 7
Advance Information DPLL and the Guard Time Circuit. Control is based on the logic levels at the control inputs LOS1, LOS2, RSEL, MS1, MS2 and GTi of the Guard Time Circuit (See Figure 6 TIE To DPLL Reference ...
Page 8
MT9042C Automatic Control Automatic Control should be used when simple MT9042C control is required, which is more complex than the very simple control provide by Manual Control with no external circuitry, but not as complex as Manual Control with a ...
Page 9
Advance Information Description Input Controls MS2 MS1 RSEL GTi Legend Change / Not Valid ...
Page 10
MT9042C Description Input Controls LOS2 LOS1 GTi RST Legend Change MTIE State ...
Page 11
Advance Information MT9042C Measures of Performance The following are some synchronizer performance indicators and their corresponding definitions. Intrinsic Jitter Intrinsic jitter is the jitter produced synchronizing circuit and is measured at its output measured by applying a reference ...
Page 12
MT9042C Holdover Accuracy Holdover accuracy is defined as the absolute tolerance of an output clock signal, when it is not locked to an external reference signal, but is operating using storage techniques. MT9042C, the storage value is determined while the ...
Page 13
Advance Information MT9042C and Network Specifications The MT9042C fully meets all applicable PLL requirements (intrinsic jitter, jitter tolerance, jitter transfer, frequency accuracy, holdover accuracy, capture range, phase change slope and MTIE during reference rearrangement) for specifications. 1. AT&T TR62411 (DS1) ...
Page 14
MT9042C CTS CXO-65-HG-5-C-20.0MHz Frequency: 20MHz Tolerance: 25ppm 0C to 70C Rise & Fall Time: 8ns (0.5V 4.5V 50pF) Duty Cycle: 45% to 55% The output clock should be connected directly (not AC coupled) to the OSCi input of the MT9042C, ...
Page 15
Advance Information SEC SIGNAL STATUS LOS2 PRI SIGNAL GOOD STATUS LOS1 GTo V SIH GTi MT9042C PRI STATE NORMAL HOLDOVER NOTES represents the time delay from when the reference goes D bad to when the MT9042C is provided ...
Page 16
MT9042C MT9074 To Line 1 DSTo TTIP DSTi To TRING TX Line XFMR F0i RTIP C4i To RRING RX Line XFMR E1.5o LOS MT9074 To Line 2 DSTo TTIP DSTi TRING To TX Line XFMR F0i RTIP C4i RRING To ...
Page 17
Advance Information To Line 1 MT9075 DSTo TTIP To DSTi TX Line TRING XFMR F0i RTIP C4i To RRING RX Line RxFP XFMR LOS To Line 2 MT9075 DSTo TTIP DSTi To TRING TX Line XFMR F0i RTIP C4i RRING ...
Page 18
MT9042C Absolute Maximum Ratings* - Parameter 1 Supply voltage 2 Voltage on any pin 3 Current on any pin 4 Storage temperature 5 PLCC package power dissipation * Exceeding these values may cause permanent damage. Functional operation under these conditions ...
Page 19
Advance Information AC Electrical Characteristics - Performance Characteristics 1 Freerun Mode accuracy with OSCi at Holdover Mode accuracy with OSCi at Capture range with OSCi at Phase lock time 11 Output ...
Page 20
MT9042C AC Electrical Characteristics - Input/Output Timing Characteristics 1 Reference input pulse width high or low 2 Reference input rise or fall time 3 8kHz reference input to F8o delay 4 1.544MHz reference input to F8o delay 5 2.048MHz reference ...
Page 21
Advance Information PRI/SEC 8kHz PRI/SEC 1.544MHz PRI/SEC 2.048MHz F8o NOTES: 1. Input to output delay values are valid after a TRST or RST with no further state changes Figure 19 - Input to Output Timing (Normal Mode) F8o F0o F16o ...
Page 22
MT9042C F8o MS1,2 LOS1,2 RSEL, GTi Figure 21 - Input Controls Setup and Hold Timing AC Electrical Characteristics - Intrinsic Jitter Unfiltered Characteristics 1 Intrinsic jitter at F8o (8kHz) 2 Intrinsic jitter at F0o (8kHz) 3 Intrinsic jitter at F16o ...
Page 23
Advance Information AC Electrical Characteristics - 8kHz Input to 8kHz Output Jitter Transfer Characteristics 1 Jitter attenuation for 1Hz@0.01UIpp input 2 Jitter attenuation for 1Hz@0.54UIpp input 3 Jitter attenuation for 10Hz@0.10UIpp input 4 Jitter attenuation for 60Hz@0.10UIpp input 5 Jitter ...
Page 24
MT9042C AC Electrical Characteristics - 8kHz Input Jitter Tolerance Characteristics 1 Jitter tolerance for 1Hz input 2 Jitter tolerance for 5Hz input 3 Jitter tolerance for 20Hz input 4 Jitter tolerance for 300Hz input 5 Jitter tolerance for 400Hz input ...
Page 25
Advance Information AC Electrical Characteristics - OSCi 20MHz Master Clock Input Characteristics 1 Frequency accuracy (20 MHz nominal Duty cycle 5 Rise time 6 Fall time † See "Notes" following AC Electrical Characteristics tables. † Notes: Voltages ...
Page 26
MT9042C Dim D (lead coplanarity) A Notes Not to ...
Page 27
Advance Information Notes: MT9042C 27 ...
Page 28
... Mitel. This publication is issued to provide information only and (unless agreed by Mitel in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Mitel without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specifi ...