MAX9719CETE+T Maxim Integrated Products, MAX9719CETE+T Datasheet - Page 12
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MAX9719CETE+T
Manufacturer Part Number
MAX9719CETE+T
Description
IC AMP AUDIO PWR 1.4W AB 16TQFN
Manufacturer
Maxim Integrated Products
Type
Class ABr
Datasheet
1.MAX9718AETBT.pdf
(27 pages)
Specifications of MAX9719CETE+T
Output Type
2-Channel (Stereo)
Max Output Power X Channels @ Load
1.4W x 2 @ 4 Ohm
Voltage - Supply
2.7 V ~ 5.5 V
Features
Depop, Differential Inputs, Shutdown, Thermal Protection
Mounting Type
Surface Mount
Package / Case
16-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Low-Cost, Mono/Stereo,
1.4W Differential Audio Power Amplifiers
The fully differential amplifier inputs can be biased at
voltages other than midsupply. The common-mode
feedback circuit adjusts for input bias, ensuring the
outputs are still biased at midsupply. Input capacitors
are not required as long as the common-mode input
voltage is within the specified range listed in the
Electrical Characteristics table.
If input capacitors are used, input capacitor C
conjunction with R
removes the DC bias from an incoming signal. The AC-
coupling capacitor allows the amplifier to bias the sig-
nal to an optimum DC level. Assuming zero-source
impedance, the -3dB point of the highpass filter is
given by:
Setting f
response of the amplifier. Use capacitors with
dielectrics that have low-voltage coefficients, such as
tantalum or aluminum electrolytic. Capacitors with high-
voltage coefficients, such as ceramics, can increase
distortion at low frequencies.
BIAS is the output of the internally generated V
bias voltage. The BIAS bypass capacitor, C
improves PSRR and THD+N by reducing power supply
and other noise sources at the common-mode bias
node, and also generates the clickless/popless startup
DC bias waveform for the speaker amplifiers. Bypass
BIAS with a 0.1µF capacitor to GND. Larger values of
C
t
and turn-off times by 10 and improves PSRR by 20dB
(at 1kHz). Do not connect external loads to BIAS.
Proper power-supply bypassing ensures low-noise,
low-distortion performance. Connect a 1µF ceramic
capacitor from V
capacitance as required by the application. Locate the
bypass capacitor as close to the device as possible.
12
ON
BIAS
/t
______________________________________________________________________________________
OFF
(up to 1µF) improve PSRR, but slow down
times. A 1µF C
-3dB
too high affects the low-frequency
f
CC
−
3
IN
dB
to GND. Add additional bulk
, forms a highpass filter that
=
BIAS
2π
R C
capacitor slows turn-on
IN IN
1
Supply Bypassing
BIAS Capacitor
Input Filter
IN
BIAS
CC
, in
/2
,
Good PC board layout is essential for optimizing perfor-
mance. Use large traces for the power-supply inputs and
amplifier outputs to minimize losses due to parasitic trace
resistance and route heat away from the device. Good
grounding improves audio performance, minimizes
crosstalk between channels, and prevents any digital
switching noise from coupling into the audio signal.
The MAX9718/MAX9719 TDFN, TQFN, TSSOP, and
µMAX packages feature exposed thermal pads on their
undersides. This pad lowers the thermal resistance of the
package by providing a direct-heat conduction path
from the die to the PC board. Connect the exposed pad
to the ground plane using multiple vias, if required.
For the latest application details on UCSP construction,
dimensions, tape carrier information, PC board tech-
niques, bump-pad layout, and recommended reflow tem-
perature profile, as well as the latest information on
reliability testing results, refer to the Application Note
1891: Wafer-Level Packaging (WLP) and Its Applications .
MAX9718A/H
MAX9718B/E
MAX9718C/F
MAX9718D/G
MAX9719A
MAX9719B
MAX9719C
MAX9719D
PART
UCSP Applications Information
MONO STEREO
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Layout and Grounding
Adjustable
Adjustable
Selector Guide
GAIN
(dB)
0
3
6
0
3
6
SELECTABLE
SHUTDOWN
POLARITY
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