DM54LS109AJ National Semiconductor, DM54LS109AJ Datasheet

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DM54LS109AJ

Manufacturer Part Number
DM54LS109AJ
Description
Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs
Manufacturer
National Semiconductor
Datasheet

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C 1995 National Semiconductor Corporation
54LS109 DM54LS109A DM74LS109A
Dual Positive-Edge-Triggered J-K Flip-Flops
with Preset Clear and Complementary Outputs
General Description
This device contains two independent positive-edge-trig-
gered J-K flip-flops with complementary outputs The J and
K data is accepted by the flip-flop on the rising edge of the
clock pulse The triggering occurs at a voltage level and is
not directly related to the transition time of the rising edge of
the clock The data on the J and K inputs may be changed
while the clock is high or low as long as setup and hold
times are not violated A low logic level on the preset or
Connection Diagram
Function Table
PR
H
H
H
H
H
H
L
L
CLR
H
H
H
H
H
H
L
L
Inputs
CLK
X
X
X
L
Order Number 54LS109DMQB 54LS109FMQB DM54LS109AJ
TL F 6368
H
H
J
X
X
X
L
L
X
See NS Package Number J16A M16A N16E or W16A
DM54LS109AW DM74LS109AM or DM74LS109AN
K
H
H
X
X
X
X
L
L
H
Q
Q
Q
H
H
L
L
0
0
Outputs
Toggle
Dual-In-Line Package
H
Q
Q
Q
H
H
L
L
0
0
clear inputs will set or reset the outputs regardless of the
logic levels of the other inputs
Features
Y
H
L
X
and or clear inputs return to their inactive (high) state
Q
established
Toggle
each active transition of the clock pulse
0
e
e
e
e
Alternate Military Aerospace device (54LS109) is avail-
able Contact a National Semiconductor Sales Office
Distributor for specifications
e
e
Low Logic Level
Either Low or High Logic Level
This configuration is nonstable that is it will not persist when preset
High Logic Level
Rising Edge of Pulse
The output logic level of Q before the indicated input conditions were
e
Each output changes to the complement of its previous level on
TL F 6368– 1
RRD-B30M105 Printed in U S A
June 1989

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DM54LS109AJ Summary of contents

Page 1

... The data on the J and K inputs may be changed while the clock is high or low as long as setup and hold times are not violated A low logic level on the preset or Connection Diagram Order Number 54LS109DMQB 54LS109FMQB DM54LS109AJ DM54LS109AW DM74LS109AM or DM74LS109AN See NS Package Number J16A M16A N16E or W16A Function Table ...

Page 2

... Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage Input Voltage Operating Free Air Temperature Range DM54LS and 54LS DM74LS Storage Temperature Range Recommended Operating Conditions Symbol ...

Page 3

Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter V Input Clamp Voltage High Level Output Voltage Low Level Output Voltage V ...

Page 4

... Physical Dimensions inches (millimeters) 16-Lead Ceramic Dual-In-Line Package (J) Order Number 54LS109DMQB or DM54LS109AJ NS Package Number J16A 4 ...

Page 5

Physical Dimensions inches (millimeters) (Continued) 16-Lead Small Outline Molded Package (M) 16-Lead Molded Dual-In-Line Package (N) Order Number DM74LS109AM NS Package Number M16A Order Number DM74LS109AN NS Package Number N16E 5 ...

Page 6

... Hong Kong Ltd 49) 0-180-530 85 86 13th Floor Straight Block a Ocean Centre 5 Canton Rd 49) 0-180-530 85 85 Tsimshatsui Kowloon a Tel ( 49) 0-180-532 78 32 Hong Kong a 49) 0-180-532 93 58 Tel (852) 2737-1600 a Tel ( 49) 0-180-534 16 80 Fax (852) 2736-9960 a National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 ...

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