MC10H145L Motorola, MC10H145L Datasheet
MC10H145L
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MC10H145L Summary of contents
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... Q n Write “0” Write “1” Read Disabled H L Q-State of Addressed Cell DIP PIN ASSIGNMENT Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6–11 of the Motorola MECL Data Book (DL122/D). REV 5 ...
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... The maximum Address Access Time is guaranteed to be the worst-case bit in the memory. 3. For proper use of MECL in a system environment, consult MECL System Design Handbook. FIGURE 1 — CHIP ENABLE STROBE MODE MOTOROLA MC10H145 + –5.2 Vdc 5% Symbol Min Max t ACS 0 4 ...
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... MECL Data DL122 — Rev 6 BLOCK DIAGRAM DATA DATA DATA DATA OUT OUT OUT OUT BUFFER BUFFER BUFFER BUFFER SENSE SENSE SENSE SENSE MEMORY CELL ARRAY WRITE AND DATA IN BUFFER 2–235 MC10H145 CS 3 CHIP SELECT BUFFER WE MOTOROLA ...
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... PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). MOTOROLA OUTLINE DIMENSIONS FN SUFFIX PLASTIC PLCC PACKAGE CASE 775–02 ISSUE C 0.007 (0.180) T L– ...
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... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “ ...