MPC9350 Motorola, MPC9350 Datasheet
MPC9350
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MPC9350 Summary of contents
Page 1
... The outputs can be disabled by deasserting the OE pin (logic high state). In PLL mode, deasserting OE maintains PLL lock due to the internal feedback path. The MPC9350 is fully 2.5V and 3.3V compatible and requires no external loop filter components. The on-chip crystal oscillator requires no external components beyond a series resonant crystal ...
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... PLL_EN (pulldown) FSELA (pulldown) FSELB (pulldown) FSELC (pulldown) FSELD (pulldown) OE GND QB VCCO QA GND TCLK PLL_EN REF_SEL Figure 2. Pinout: 32–Lead Package Pinout (Top View) For More Information On This Product, MOTOROLA 0 2 PLL Ref 200 - 400 MHz Figure 1. MPC9350 Logic Diagram MPC9350 to: www.freescale.com ...
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... Positive power supply for I/O and core 0 Selects TCLK PLL enabled. The VCO output is routed to the output dividers 32 Selects feedback divider VCO = 16 * Input reference clock Outputs disabled VCO VCO VCO VCO Min -0.3 -0.3 -0.3 - to: www.freescale.com MPC9350 Function Max Unit Condition 125 C MOTOROLA ...
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... Maximum Quiescent Supply Current V TT Output termination voltage 1. The MPC9350 is capable of driving 50 transmission lines on the incident edge. Each output drives one 50 parallel terminated transmission line to a termination voltage Alternatively, the device drives up to two 50 series terminated transmission lines. AC CHARACTERISTICS ( 3.3V Symbol ...
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... V TT Output termination voltage a. The MPC9350 is capable of driving 50 transmission lines on the incident edge. Each output drives one 50 parallel terminated transmission line to a termination voltage Alternatively, the device drives up to two 50 series terminated transmission lines per output. For More Information On This Product, TIMING SOLUTIONS 5 – ...
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... Freescale Semiconductor, Inc. MPC9350 Programming the MPC9350 The MPC9350 clock driver outputs can be configured into several divider modes, in addition the internal feedback of the device allows for flexibility in establishing two input to output frequency relationships. The output division settings establish the output frequency relationship. The output divider of the four output groups allows the user to configure the outputs into 1:1, 2:1, 4:1 and 4:2:1 frequency ratios ...
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... DC voltage drop that will be seen between the V CC supply and the V CCA pin of the MPC9350. From the data sheet the I VCCA current (the current sourced through the V CCA pin) is typically 10 mA (15 mA maximum), assuming that a minimum of 3.0V must be maintained on the V CCA pin ...
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... Termination Waveforms” show the simulation results of an output driving a single line versus two lines. In both cases the drive capability of the MPC9350 output buffer is more than sufficient to drive 50 transmission lines on the incident edge. Note from the delay measurements in the simulations a delta of only 43ps exists between the two differently loaded outputs ...
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... Freescale Semiconductor, Inc. PULSE GENERATOR Figure 7. TCLK MPC9350 AC test reference for 3.3V and 2.5V t SK(O) The pin–to–pin skew is defined as the worst case difference in propagation delay between any similar delay path within a single device Figure 8. Output–to–output Skew t SK(O) ...
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... Freescale Semiconductor, Inc. MPC9350 –T– DETAIL –Z– –AB– SEATING –AC– PLANE 0.10 (0.004 DETAIL AD For More Information On This Product, MOTOROLA OUTLINE DIMENSIONS FA SUFFIX LQFP PACKAGE CASE 873A-02 ISSUE A 4X 0.20 (0.008) AB T–U Z –U– 0.20 (0.008) AC T– ...
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... Freescale Semiconductor, Inc. For More Information On This Product, TIMING SOLUTIONS NOTES 11 Go to: www.freescale.com MPC9350 MOTOROLA ...
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... ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. 852–26668334 Technical Information Center: 1–800–521–6274 HOME PAGE: http://www.motorola.com/semiconductors/ For More Information On This Product, MOTOROLA 12 Go to: www.freescale.com MPC9350/D TIMING SOLUTIONS ...