IDT71V2558 Integrated Device Technology, Inc., IDT71V2558 Datasheet
IDT71V2558
Available stocks
Related parts for IDT71V2558
IDT71V2558 Summary of contents
Page 1
... Input Input Input Input Input Input Input Input Input Input Input Input Output Input Input I/O Supply Supply 1 IDT71V2556S IDT71V2558S IDT71V2556SA IDT71V2558SA , that allow the user Synchronous Synchronous Asynchronous Synchronous Synchronous Synchronous N/A Synchronous Static Synchronous Synchronous N/A Synchronous Asynchronous Synchronous ...
Page 2
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Symbol Pin Function I Address Inputs ADV/LD Advance / Load I R/W Read / Write I CEN Clock Enable I BW Individual Byte I - Write Enables Chip Enables Chip Enable ...
Page 3
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs LBO Address A [0:16] CE1, CE2, CE2 R/W CEN ADV/LD BWx Clock OE TMS TDI TCK TRST (optional Address D Q Control D Q Control Logic ...
Page 4
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs LBO Address A [0:17] CE1, CE2, CE2 R/W CEN ADV/LD BWx Clock OE TMS TDI TCK TRST (optional) Symbol Parameter Min. V Core Supply Voltage 3 ...
Page 5
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs (1) Grade Temperature V SS Commercial 0°C to +70°C 0V Industrial -40°C to +85°C 0V NOTES the "instant on" case temperature. A 100 DDQ I I I/O ...
Page 6
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs 100 DDQ I I DDQ DDQ DDQ NOTES: 1. Pins 14, 16 and 66 do not have to be connected directly the input voltage is V ...
Page 7
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs DDQ I DDQ I I DDQ K I DDQ DDQ DDQ I DDQ I DDQ I DDQ N I DDQ NOTES: 1. J3, J5, and R5 do not have to be directly connected and A4 are reserved for future 8M and 16M respectively. 3. These pins are NC for the " ...
Page 8
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs 1 2 CE1 I/O I I/O I I/O I I/O I ( I/O I I/O I I/O I I (2) LBO ( ( ( LBO R NC (2) NOTES: 1 ...
Page 9
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs CEN (5) R/W Chip ADV/LD Enable L L Select Select Deselect NOTES Don’t Care When ADV/LD signal is sampled high, the internal burst counter is incremented. The R/W signal is ignored when the counter is advanced. Therefore the nature of the burst cycle (Read or Write) is determined by the status of the R/W signal when the first address is loaded at the beginning of the burst cycle ...
Page 10
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs First Address Second Address Third Address (1) Fourth Address NOTE: 1. Upon completion of the Burst sequence the counter wraps around to its initial state and continues counting. ...
Page 11
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Cycle Address R/W ADV NOTES defined and High Low Don’t Care High Impedance. ...
Page 12
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Cycle Address R/W ADV NOTES High Low Don’t Care High Impedance defined and Cycle Address R/W ADV/LD ...
Page 13
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Cycle Address R/W ADV NOTES High Low Don’t Care High Impedance defined and Cycle Address R/W ADV/ n+1 ...
Page 14
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Cycle Address R/W ADV NOTES High Low Don’t Care Don’t Know High Impedance defined and Device Outputs are ensured High-Z after the first rising edge of clock upon power-up. ...
Page 15
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Symbol Parameter |I | Input Leakage Current LI LBO, JTAG and ZZ Input Leakage Current | Output Leakage Current LO V Output Low Voltage OL V Output High Voltage ...
Page 16
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Symbol Parameter t Clock Cycle Time CYC (1) Clock Frequence t F (2) Clock High Pulse Width t CH (2) Clock Low Pulse Width t CL Output Parameters t Clock High to Valid Data ...
Page 17
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges 6. ...
Page 18
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges 6. ...
Page 19
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges 6. ...
Page 20
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs CEN Commercial and Industrial Temperature Ranges 6. ...
Page 21
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs CS Commercial and Industrial Temperature Ranges 6. ...
Page 22
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs TCK (1) Device Inputs / TDI/TMS (2) Device Outputs / TDO ( 3) TRST t JRST NOTES: 1. Device inputs = All device inputs except TDI, TMS and TRST. 2. Device outputs = All device outputs except TDO. ...
Page 23
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Instruction Field Revision Number (31:28) IDT Device ID (27:12) IDT JEDEC ID (11:1) ID Register Indicator Bit (Bit 0) Instruction EXTEST SAMPLE/PRELOAD DEVICE_ID HIGHZ RESERVED RESERVED ...
Page 24
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges 6.42 24 ...
Page 25
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges 6.42 25 ...
Page 26
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs Commercial and Industrial Temperature Ranges 6.42 26 ...
Page 27
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs OE OE DATA OUT NOTE read operation is assumed progress. XX IDT XXXX XX Device Power Speed Type t OHZ XX X Package Process/ Temperature Range Blank I PF** ...
Page 28
... IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter, and Pipelined Outputs 6/30/99 8/23/99 Pp Pg. 6 Pg. 14 Pg. 15 Pg. 22 Pg. 24 10/4/99 Pg. 14 Pg. 15 12/31/99 04/30/00 Pg. 5,6 Pg. 6 Pg. 7 Pg. 21 05/26/00 Pg. 23 07/26/00 Pg. 5,6,7 Pg. 8 Pg. 23 10/25/00 Pg ...