CXA2542Q Sony, CXA2542Q Datasheet
CXA2542Q
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CXA2542Q Summary of contents
Page 1
... RF Signal Processing Servo Amplifier for CD Player Description The CXA2542Q is a bipolar IC developed for CD player RF signal processing and servo control. Features • Automatic focus bias adjustment circuit • Automatic tracking balance and gain adjustment circuits • RF level control circuit • Interruption countermeasure circuit • ...
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... TOG1-4 PHASE COMPENSATION V CC FS1 FS2 – 2 – IIL TTL DFCT IIL TTL TTL IIL FS1-4 TG1-2 TM1-7 PS1-4 ISET TM4 TM6 TM7 TM3 TM5 FSET TG2 CXA2542Q 24 SENS2 23 SENS1 22 C. OUT 21 XRST 20 DATA 19 XLT 18 CLK ISET 15 SL_O 14 SL_M 13 SL_P TM2 ...
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... CXA2542Q Description Focus error input. Connects the capacitor for defect time constant. Ground this pin through a capacitor for cutting the focus servo high- frequency gain. External time constant setting pin for boosting the focus servo low- frequency ...
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... CXA2542Q Description External time constant setting pin for switching tracking high- frequency gain. External time constant setting pin for switching tracking high-frequency gain. Peak frequency setting pin for focus and tracking phase compensation amplifier ...
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... CXA2542Q Description Positive power supply. Serial data transfer clock input from CPU. (no pull-up resistance) Serial data input from CPU. (no pull-up resistance) Latch input from CPU. (no pull-up resistance) Reset input; resets at Low. (no pull-up resistance) Track number count signal output ...
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... Input for the RF summing amplifier output with capacitance coupled. RF summing amplifier output. Eye- pattern check point summing amplifier inverted input. The RF amplifier gain is determined by the resistance connected between this pin and RFO pin. External time constant setting pin during RF level control. CXA2542Q ...
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... V EE – 7 – CXA2542Q Description APC amplifier output. APC amplifier input. RF I-V amplifier inverted input. Connect these pins to the photo diode and pins. F I-V and E I-V amplifier inverted input. Connects these pins to photo diodes F and E. ...
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... CXA2542Q Description Tracking error amplifier output. E-F signal is output. Connects the capacitor for defect time constant. Comparator input for balance adjustment. (Input from TEO through LPF) Window comparator input for ATSC detection ...
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... VC 10µ 51k 147 75k 9k 10µ 25p 147 174k 10µ 300µ – 9 – CXA2542Q Description ( )/2 direct voltage output Focus zero-cross comparator input. Focus error amplifier output. Connected internally to the window comparator input for bias adjustment. ...
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... IFB4: ON, BIAS0: reference 3B7 48 Output gain difference with V18 IFB5: ON, BIAS0: reference 3AF 48 Output gain difference with V19 IFB6: ON, BIAS0: reference 39F 48 Output gain difference with V20 – 10 – CXA2542Q (V = 1.5V 1.5V, Topr = 25° Min. Typ. Max. 12.2 18.8 25.4 –18.8 –12.2 – ...
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... V1 = 1VDC, TOG: OFF 308 BAL1 3C4 364µA 3C4 439µA 3C4 515µA 3C4 35 34 0.8mA sink I1 = 515µA, 3C0 35 34 LD: OFF – 11 – CXA2542Q Min. Typ. Max. Unit –35 –20 –5 mV – 7.2 10.2 13.2 dB 10.2 13.2 dB 7.2 dB 1.2 4.2 7.2 – ...
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... Input voltage when TG2 (Pin 9) goes from Vcc/2 to Vcc Input voltage when TG2 (Pin goes from Vcc/2 to Vcc Pin 44 voltage when SENS1 (Pin 23 – 12 – CXA2542Q Min. Typ. Max. Unit mV 725 1330 1935 476 886 1296 mV –1421 –816 –211 mV –803 –393 ...
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... Measures at SENS1 pin. 36 Measures at SENS1 pin. 36 Measures at SENS1 pin. 36 Measures at SENS1 pin. – 13 – CXA2542Q Min. Typ. Max –20 –5 –35 168 193 218 127 145 163 –400 –367 –330 50 — — –34 — — 1 1.3 — — –1.3 – ...
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... CXA2542Q ...
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... DRIVER Vcc MICRO 0.01µ COMPUTER 0.033µ DSP SENS2 SENS1 23 C. OUT 22 XRST 21 DATA 20 XLT 19 CLK 18 Vcc Vcc 17 60k ISET 16 100k SL_O 15 DRIVER 0.015µ SL_M 14 8.2k SL_P 13 3.3µ 22µ 15k 82k 100k 510k 0.015µ DRIVER Vcc CXA2542Q ...
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... A PD1 C iPD1 B PD2 D iPD2 The low frequency component of the RFO output voltage is V 58k 10k VA 36 PD1 IV AMP VC 58k 10k VB 37 PD2 IV AMP VC = –2.2 (V RFO – 16 – CXA2542Q 22k RF_M RF_O SUMMING AMP 127.6kΩ (iPD1 + iPD2 ...
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... FE AMP R6 174k FOCUS PHASE VC COMPENSATION VIN > VIN < FOH 20mV VIN VC FOL VL VIN > VIN < –20mV VC iPD1) – (–58kΩ iPD2)} – 17 – CXA2542Q FEO 48 R10 10k FEI 1 R9 10k 2200p GND GND FE_M 6 R11 R8 100k 100k FE_O 5 VC SENS1 23 SENS SELECTOR ...
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... When performing conventional focus bias adjustment Fix the focus bias adjustment switches to the desired settings. (for example, IFB6 ON) In this condition, adjust the focus bias by turning a volume connected to FE_BIAS (Pin 40). D11 D6 001110 ) < 50mV Variable voltage per 2 steps – 18 – CXA2542Q ...
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... VC 150mV 403kΩ R3 – 19 – VIN > VIN < BALH SENS1 20mV 23 VC VIN BALL VL VIN > SENS –20mV VIN < SELECTOR VIN > VIN < TGH 200mV SENS2 VC 24 VIN TGL VL VIN > VIN < XRST VC 21 DATA 20 COMAND COMAND CONTROL CONTROL XLT 19 CLK 18 CXA2542Q CPU ...
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... When the TEO signal level is low and TGH (SENS1 pin) does not go Low, the gain should be raised with the TGFL command for adjustment. If the adjustment does not bring the result of Low, check the pulse duty of TGL (SENS2 pin). V < V < < (2) (3) H – 20 – D11 D6 001100 ) < D11 D6 001101 ) CXA2542Q ...
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... R11 10k 10k RF_I 1.1Vpp 1.47V 39.5k 31 RF_O R9 23. R13 and controlling the laser power in sync with the L according to the results of comparison with the L V variable range L – 21 – LDON R12 56k VREF LPC ON/OFF R14 12.5k 50%/17% 670mV 1µ CXA2542Q ...
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... Center Voltage Generation Circuit (The figure below shows a single voltage application; Connect to GND for dual power supplies.) Maximum current is approximately ±3mA. Output impedance is approximately 50Ω 30k 30k V EE Connected internally to the pin. EE – 22 – CXA2542Q V CC GND ...
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... FS4 68k Focus FS3 phase Compensation 40k FLB FSET 4 10 0.015µ 0.1µ 510k – 23 – 23 SENS1 FE_O 100k 5 100k 50k FE_M 6 11µ 22µ 60k ISET 16 50k FS1 FS2 Charge up SRCH 7 4.7µ . However, changing EE 15%. CXA2542Q FOCUS COIL ...
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... OFF. The peak frequency of the tracking phase compensation is approximately 1.2kHz when a 510kΩ resistance is connected to Pin 10. In the CXA2542Q, TG1 and TG2 are inter-linked switches. To jump tracks in FWD and REV directions, turn TM3 or TM4 ON. During this time, the peak voltage applied to the tracking coil is determined by the TM3 or TM4 current and the feedback resistance from Pin 11 ...
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... Track jump current (TM3 and TM4 current • Sled kick current (TM5 and TM6 current, when during 1X$ commands Use external resistance of between 30kΩ to 240kΩ. Using external resistance outside this range may cause oscillation approximately 1.27V – 25 – CXA2542Q ...
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... V RFI RFO 0.033µ CC1 CC2 27 26 FLIP FLOP c d DFCT1 DEFECT SW DEFECT COMPARATOR DEFECT BOTTOM HOLD 28 f 0.01µ INTERRUPTION COMPARATOR – 26 – 20k FOK 25 FOCUS OK COMPARATOR DFCT2 SENS2 24 e SENS SELECTOR 23 SENS1 d BOTTOM HOLD (2) solid line CXA2542Q ...
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... High; and when a defect is detected High. The mirror hold time constant must be sufficiently large compared with the traverse signal. MIRROR HOLD AMP H PEAK & BOTTOM 1 J HOLD I MIRR MIRROR COMPARATOR – 27 – CXA2542Q 0.033µ SENS 24 SENS2 SELECTOR ...
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... SENS1 and SENS2 are switched without latching. HIGH-Z DFCT2 MIRR BALL SENS1 23 TGL FOL DATA SENS1 FZC DFCT1 TZC (HIGH-Z) DATA – 28 – SENS2 24 SENS2 H (HIGH-Z) DFCT2 MIRR H (HIGH-Z) SENS1 SENS2 BALH BALL X X TGH TGL X X FOH FOL ATSC (HIGH-Z) CXA2542Q ...
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... The input data to operate this IC is configured as 8-bit/12-bit data; however, below, this input data is represented by 2-digit hexadecimal numerals in the form $XX, where hexadecimal numeral between 0 and F/$XXX for 12-bit. Commands for the CXA2542Q can be broadly divided into four groups ranging in value from $0X, $1X, $2X, $3XX. 1. $0X (FZC at SENS1 pin (Pin 23), H (Hi-Z) at SENS2 pin (Pin 24)) These commands are related to focus servo control ...
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... Drive voltage Focus error SENS1 (FZC) Focus OK A Fig. 3. S-curve (20ms) (200ms) $02 $03 $08 The instant when the signal is brought into focus. Fig. 4. Focus ON timing chart – 30 – t The broken lines in the figure indicate the voltage assuming the signal is not in focus. CXA2542Q ...
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... RF envelope and the tracking error is 180° out-of-phase to cut the unneeded portion of the tracking error and apply braking TG1, TG2 Break Sled kick circuit ON/OFF ON/OFF – 31 – Transfer $ YES FZC ? NO YES Latch (B) Sled kick height D1 (PS1) (PS0 height 1 1 CXA2542Q D0 0 ±1 1 ±2 0 ±3 1 ±4 ...
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... From outer to inner track Fig. 7. Internal waveform Tracking control 00 off 01 Servo ON 10 F-JUMP 11 R-JUMP TM1, TM3, TM4, – 32 – D2 TM7 Low: open High: make [ H] ("MIRR") ("TZC") Braking is applied from here Sled control 00 off 01 Servo ON 10 F-FAST FORWARD 11 R-FAST FORWARD TM2, TM5, TM6 CXA2542Q ...
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... In a fashion similar to the method used with the balance adjustment, set the data by specifying switch conditions and sending a latch pulse with and START C.OUT is the frequency high BAL1 to BAL4 enough ? Switch Control SENS1/2 Balance OK ? Adjustment Completed Balance adjustment TOG1 to TOG4 Switch control NO Adjustment Completed Gain adjustment – 33 – NO YES START SENS1/2 GAIN OK ? YES CXA2542Q ...
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... The control limit is ±17% with and ±50% with • LDON The laser diode can be turned ON and OFF by setting D2 with and The laser diode is ON with and OFF with IFB1 to 6 Switch Control BIAS YES Adjustment Completed Focus bias adjustment method – 34 – START SENS1/2 CXA2542Q ...
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... The interruption countermeasure circuit is forcibly turned OFF regardless of the command when the tracking gain is increased. (including when the gain is increased by ATSC) Even if DFCT is disabled, the interruption countermeasure circuit operates when INT is enabled. side and TG2 is OFF. Even if TG1 and TG2 are NORMAL mode, – 35 – CXA2542Q ...
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... Hold time h t Delay time D t Latch pulse width WL t Data transfer interval CD Low level input voltage V IL High level input voltage WCK Min. Typ. 500 500 500 500 1000 1000 (V 0 – 0 – 36 – 3.0V) CC Max. Unit 1 MHz – 0 CXA2542Q D0 ...
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... CXA2542Q ...
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... CXA2542Q ...
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... CXA2542Q 1: OFF 0: ON • FS2 OFF • FS4 In the Block Diagram: 1:SW side 0:SW side In the Block Diagram: 1:SW side 0:SW side • TG2 1: OFF 0: ON • BRAKE When D2 in Fig • Sled kick height D1 D0 Relative value ...
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... Function TM6 TM5 TM4 TM3 TM2 – 40 – CXA2542Q TM1 Notes) • TM1/TM2 the Block Diagram: 0 1:SW side 0 0:SW side • TM3/TM4/TM5/TM6 OFF ...
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... RDF INT ATSC LDON LPCL LPC DFCT CT2 — — — — — — — — — — — — — — — — CXA2542Q 0 — 1 — 0 — 1 — 0 — 1 — 0 — 1 — 0 — 1 — 0 — 1 — 0 — 1 — 0 — 1 — ...
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... TRACKING GAIN : TOG1 to TOG4 = 0 (switch ON), TGFL NORMAL FOCUS BIAS : IFB1 to IFB6 = 0 (switch ON) Others : INT DISABLE, DFCT2 RESET, ATSC ENABLE, LDON OFF, LPCL ±17%, LPC OFF ADDRESS DATA ADDRESS D11 D10 – 47 – HEX $20 DATA HEX $300 $340 $380 $3D0 CXA2542Q ...
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... Vsat (NPN Measurement pin Conditions C FLB 6 C FGD 13 C TGU 13 13 and controlling the laser power in sync with the L – 48 – 20k FOK Typ. Unit 21 0.1µF = 0.1µF 63 deg 13 dB –125 deg = 0.1µF 26.5 dB –130 deg CXA2542Q L ...
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... M 2.2 – 0.15 PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT QFP-48P-L04 LEAD MATERIAL QFP048-P-1212-B PACKAGE WEIGHT – 49 – + 0.1 0.15 – 0.05 0.15 + 0.2 0.1 – 0.1 + 0.35 EPOXY RESIN SOLDER / PALLADIUM PLATING COPPER / 42 ALLOY 0.7g CXA2542Q ...