74HC4094A IK Semiconductor, 74HC4094A Datasheet

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74HC4094A

Manufacturer Part Number
74HC4094A
Description
Manufacturer
IK Semiconductor
Datasheet

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8-Bit Serial-Input Shift Register
With Latched 3-State Outputs
High-Performance Silicon-Gate CMOS
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
with three-state parallel outputs. Data is shifted serially through the shift
register on the positive going transition of the clock input signal. The
output of the last stage SQ
following negative transition of the clock input signal. The data of each
stage of the shift register is provided with a latch, which latches data on
the negative going transition of the Strobe input signal. When the Strobe
input is held high, data propagates through the latch to a 3-state output
buffer.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
The IN74HC4094A is identical in pinout to the LS/ALS4094. The
This device consists of an 8-bit shift register and 8-bit D-type latch
Data on the SQ
This buffer is enabled when Output Enable input is taken high.
H
LOGIC DIAGRAM
output is transferred to a second output (SQ
PIN 8 = GND
PIN 16 =V
H
can be used to cascade several devices.
CC
H
NC = No Change
Z = high impedance
X = don’t care
’) on the
Clock Output
Enable
H
H
H
H
L
L
Inputs
T
A
ORDERING INFORMATION
FUNCTION TABLE
= -55° to 125° C for all packages
Strobe A Q
IN74HC4094AN Plastic
IN74HC4094AD SOIC
PIN ASSIGNMENT
X
X
H
H
X
L
TECHNICAL DATA
IN74HC4094A
X
X
X NC
H
X NC
L
H
Z
Z
L
Parallel
Outputs
A
Q
Q
NC
NC
Q
Z
Z
N-1
N-1
N
Rev. 00
SQ
NC SQ
NC SQ
Q6 NC
Q6 NC
Q6 NC
Q6 NC
Outputs
Serial
H
SQ
H
H
H

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74HC4094A Summary of contents

Page 1

... Serial-Input Shift Register With Latched 3-State Outputs High-Performance Silicon-Gate CMOS The IN74HC4094A is identical in pinout to the LS/ALS4094. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of an 8-bit shift register and 8-bit D-type latch with three-state parallel outputs ...

Page 2

... Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V outputs must be left open. Parameter and GND Pins CC SOIC Package+ Parameter and V should be constrained to the range GND≤(V IN OUT IN74HC4094A Value Unit -0.5 to +7 ±20 mA ±25 mA ±50 750 ...

Page 3

... OUT GND 6 Output in High-Impedance 6.0 State GND OUT GND 6 =0µA OUT IN74HC4094A Guaranteed Limit Unit 25 °C ≤85 ≤125 to °C °C -55°C 1.5 1.5 1.5 V 3.15 3.15 3.15 4.2 4.2 4.2 0.5 0.5 0.5 V 1.35 1.35 1.35 1.8 1.8 1.8 1.9 1 ...

Page 4

... CC CC =50pF,Input t =t =6.0 ns °C to -55°C 2.0 50 4.5 10 6.0 9.0 2.0 3 4.5 3 6.0 3 2.0 80 4.5 16 6.0 14 2.0 1000 4.5 500 6.0 400 IN74HC4094A Guaranteed Limit Unit 25 °C ≤85°C ≤125°C to -55° MHz 150 190 225 195 245 295 ...

Page 5

... Figure 1. Switching Waveforms Figure 3. Switching Waveforms Figure 5. Test Circuit IN74HC4094A Figure 2. Switching Waveforms Figure 4. Switching Waveforms Figure 6. Test Circuit Rev. 00 ...

Page 6

... EXPANDED LOGIC DIAGRAM IN74HC4094A Rev. 00 ...

Page 7

... TIMING DIAGRAM IN74HC4094A Rev. 00 ...

Page 8

... Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B ‑ 0.25 mm (0.010) per side. N SUFFIX PLASTIC DIP (MS - 001BB SEATING -T- PLANE SUFFIX SOIC (MS - 012AC SEATING PLANE IN74HC4094A Dimension, mm Symbol MIN MAX A 18.67 19.69 B 6.1 7.11 5. 0.36 0.56 F 1.14 1. ° 10 ° 2.92 3 ...

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