LH28F640BFN-PTTLZ2 Sharp, LH28F640BFN-PTTLZ2 Datasheet

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LH28F640BFN-PTTLZ2

Manufacturer Part Number
LH28F640BFN-PTTLZ2
Description
Manufacturer
Sharp
Datasheet

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Part Number:
LH28F640BFN-PTTLZ2
Manufacturer:
SHARP
Quantity:
492
Date
Nov. 16. 2001
64M (x16) Flash Memory
LH28F640BFN-PTTLZ2

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LH28F640BFN-PTTLZ2 Summary of contents

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... Flash Memory LH28F640BFN-PTTLZ2 Date Nov. 16. 2001 ...

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Handle this document carefully for it contains material protected by international copyright law. Any reproduction, full or in part, of this material is prohibited without the express written permission of the company. When using the products covered herein, please observe ...

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SOP Pinout ................................................... 3 Pin Descriptions.......................................................... 4 Memory Map .............................................................. 5 Identifier Codes and OTP Address for Read Operation ............................................. 6 OTP Block Address Map for OTP Program............... 7 Bus Operation............................................................. 8 Command Definitions ................................................ 9 Functions of Block ...

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... Fast program capability is provided through the use of high speed Page Buffer Program. Special OTP (One Time Program) block provides an area to store permanent code such as a unique number. * ETOX is a trademark of Intel Corporation. LHF64FZ2 LH28F640BFN-PTTLZ2 64Mbit (4Mbit 16) Page Mode Flash MEMORY Enhanced Data Protection Features • ...

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LHF64FZ2 44-LEAD SOP STANDARD PINOUT CE# 12 ...

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Symbol Type A -A ADDRESS INPUTS: Inputs for addresses. 64M: A INPUT 0 21 DATA INPUTS/OUTPUTS: Inputs data and commands during CUI (Command User INPUT/ Interface) write cycles, outputs data during memory array, status register, query code and DQ -DQ ...

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BLOCK NUMBER ADDRESS RANGE 3FF000H - 3FFFFFH 134 4K-WORD 3FE000H - 3FEFFFH 133 4K-WORD 3FD000H - 3FDFFFH 132 4K-WORD 3FC000H - 3FCFFFH 131 4K-WORD 3FB000H - 3FBFFFH 130 4K-WORD 3FA000H - 3FAFFFH 129 4K-WORD 128 4K-WORD 3F9000H - 3F9FFFH 127 ...

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Table 2. Identifier Codes and OTP Address for Read Operation Manufacturer Code Manufacturer Code Device Code Top Parameter Device Code Block Lock Configuration Block is Unlocked Code Block is Locked Block is not Locked-Down Block is Locked-Down OTP OTP Lock ...

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LHF64FZ2 [ 000088H Customer Programmable Area 000085H 000084H Factory Programmed Area 000081H Reserved for Future Implementation 000080H (DQ -DQ 15 Customer Programmable Area Lock Bit (DQ Factory Programmed Area Lock Bit (DQ Figure 3. OTP Block ...

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Table 3. Bus Operation Mode Notes RST# Read Array Output Disable V IH Standby V IH Reset Read Identifier Codes/OTP V Read Query 6,7 IH Write 4,5 NOTES: 1. ...

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Command Read Array Read Identifier Codes/OTP Read Query Read Status Register Clear Status Register Block Erase Full Chip Erase Program Page Buffer Program Block Erase and (Page Buffer) Program Suspend Block Erase and (Page Buffer) Program Resume Set Block Lock ...

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... Following the Clear Block Lock Bit command, the selected block is unlocked regardless of lock-down configuration. 10. Commands other than those shown above are reserved by SHARP for future device implementations and should not be used. 11. When the status register data is read, input the address to which the erase or program operation is executed. ...

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Table 5. Functions of Block Lock Current State (1) (1) State [00 (3) [01] [10 [11 NOTES =1: a block is locked; DQ =0: a block ...

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WSMS BESS BEFCES 7 6 SR.15 - SR.8 = RESERVED FOR FUTURE ENHANCEMENTS (R) SR.7 = WRITE STATE MACHINE STATUS (WSMS Ready 0 = Busy SR.6 = BLOCK ERASE SUSPEND STATUS (BESS ...

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SMS XSR.15-8 = RESERVED FOR FUTURE ENHANCEMENTS (R) XSR.7 = STATE MACHINE STATUS (SMS Page Buffer Program available 0 = Page Buffer Program not available XSR.6-0 = RESERVED FOR FUTURE ENHANCEMENTS ...

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Electrical Specifications 1.1 Absolute Maximum Ratings Operating Temperature During Read, Erase and Program ...... +70 C Storage Temperature During under Bias............................... - +80 C During non Bias................................ - +125 C Voltage On ...

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Capacitance ( f=1MHz) A Parameter Symbol Input Capacitance RST# Input Capacitance Output Capacitance NOTE: 1. Sampled, not 100% tested. 1.2.2 AC Input/Output Test Conditions V CC INPUT 0.0 AC test inputs are driven at V ...

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DC Characteristics Symbol Parameter I Input Load Current LI I Output Leakage Current Standby Current CCS Automatic Power Savings Current CCAS Reset Power-Down Current CCD CC Average V Read CC ...

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AC Characteristics - Read-Only Operations Symbol t Read Cycle Time AVAV t Address to Output Delay AVQV t CE# to Output Delay ELQV t Page Address Access Time APA t OE# to Output Delay GLQV t RST# High to ...

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(A) (A) 21-0 20 (E) CE OE# ( (W) WE (D/Q) 15 (P) RST# V ...

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(A) (A) 21-3 20 (A) 2 CE# ( OE# ( WE# ( High ...

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AC Characteristics - Write Operations Symbol t Write Cycle Time AVAV RST# High Recovery to WE# (CE#) Going Low PHWL PHEL CE# (WE#) Setup to WE# (CE#) Going Low ELWL WLEL t (t ...

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NOTE (A) (A) 21-0 20 (E) CE ELWL WLEL V IH OE# ( PHWL PHEL V IH WE# ( ...

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Reset Operations V IH RST# ( High (D/Q) 15 RST# ( High (D/Q) 15 (min GND V ...

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Block Erase, Full Chip Erase, (Page Buffer) Program and OTP Program Performance Symbol Parameter 4K-Word Parameter Block t WPB Program Time 32K-Word Main Block t WMB Program Time t / WHQV1 Word Program Time t EHQV1 t / WHOV1 ...

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... Related Document Information Document No. FUM00701 NOTE: 1. International customers should contact their local SHARP or distribution sales offices. LHF64FZ2 (1) Document Name LH28F640BF series Appendix 24 Rev. 2.41 ...

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A-1 RECOMMENDED OPERATING CONDITIONS A-1.1 At Device Power-Up AC timing illustrated in Figure A-1 is recommended for the supply voltages and the control signals at device power-up. If the timing in the figure is ignored, the device may not operate ...

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A-1.1.1 Rise and Fall Time Symbol t V Rise Time Input Signal Rise Time R t Input Signal Fall Time F NOTES: 1. Sampled, not 100% tested. 2. This specification is applied for not only the device ...

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A-1.2 Glitch Noises Do not input the glitch noises which are below V as shown in Figure A-2 (b). The acceptable glitch noises are illustrated in Figure A-2 (a). Input Signal V (Min (Max.) IL Input Signal (a) ...

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... A-2 RELATED DOCUMENT INFORMATION Document No. AP-001-SD-E AP-006-PT-E AP-007-SW-E NOTE: 1. International customers should contact their local SHARP or distribution sales office. (1) Document Name Flash Memory Family Software Drivers Data Protection Method of SHARP Flash Memory RP#, V Electric Potential Switching Circuit PP iv Rev. 1.10 ...

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