MC68HC705J1A Freescale Semiconductor, Inc, MC68HC705J1A Datasheet

no-image

MC68HC705J1A

Manufacturer Part Number
MC68HC705J1A
Description
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Freescale Semiconductor
MC68HC705J1A
MC68HRC705J1A
MC68HSC705J1A
MC68HSR705J1A
Technical Data
M68HC05
Microcontrollers
MC68HC705J1A/D
Rev. 4, 5/2002
© Freescale Semiconductor, Inc., 2004. All rights reserved.
For More Information On This Product,
Go to: www.freescale.com

Related parts for MC68HC705J1A

MC68HC705J1A Summary of contents

Page 1

... Freescale Semiconductor Microcontrollers © Freescale Semiconductor, Inc., 2004. All rights reserved. M68HC05 For More Information On This Product, Go to: www.freescale.com MC68HC705J1A MC68HRC705J1A MC68HSC705J1A MC68HSR705J1A Technical Data MC68HC705J1A/D Rev. 4, 5/2002 ...

Page 2

... Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com ...

Page 3

... To verify you have the latest information available, refer to: http://www.freescale.com The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Go to: www.freescale.com Technical Data ...

Page 4

... May, 2002 4.0 state 6.3.3 Pulldown Register A 6.4.3 Pulldown Register B Technical Data Revision History Description — Corrected reset state for — Corrected note — Corrected note For More Information On This Product, Go to: www.freescale.com Page Number(s) 37 — Corrected reset MC68HC705J1A — Rev. 4.0 ...

Page 5

... Section 10. Electrical Specifications 117 Section 11. Mechanical Specifications . . . . . . . . . . . . . 131 Section 12. Ordering Information . . . . . . . . . . . . . . . . . 135 Appendix A. MC68HRC705J1A . . . . . . . . . . . . . . . . . . . 137 Appendix B. MC68HSC705J1A . . . . . . . . . . . . . . . . . . . 141 Appendix C. MC68HSR705J1A . . . . . . . . . . . . . . . . . . . 145 Index 151 MC68HC705J1A — Rev. 4.0 For More Information On This Product, (COP) Module . . . . . . . . . . . . . . . . . . . . . . . . . 97 List of Sections Go to: www.freescale.com List of Sections Technical Data ...

Page 6

... Freescale Semiconductor, Inc. List of Sections Technical Data List of Sections For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 7

... MC68HC705J1A — Rev. 4.0 For More Information On This Product, Section 1. General Description Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Programmable Options Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V and OSC1 and OSC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Ceramic Resonator Oscillator ...

Page 8

... Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Inherent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 Immediate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Direct . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Extended . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Indexed, No Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Indexed, 8-Bit Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Indexed, 16-Bit Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Relative . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54 Instruction Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 Register/Memory Instructions . . . . . . . . . . . . . . . . . . . . . 55 Read-Modify-Write Instructions . . . . . . . . . . . . . . . . . . . . 56 Jump/Branch Instructions . . . . . . . . . . . . . . . . . . . . . . . .57 Bit Manipulation Instructions . . . . . . . . . . . . . . . . . . . . . . 59 Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table of Contents For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 9

... MC68HC705J1A — Rev. 4.0 For More Information On This Product, Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Opcode Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Section 4. Resets and Interrupts Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Resets Power-On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71 External Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 COP Watchdog Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Illegal Address Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Interrupts ...

Page 10

... Module Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 COP Watchdog Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 COP Watchdog Timeout Period . . . . . . . . . . . . . . . . . . . . . . 98 Clearing the COP Watchdog . . . . . . . . . . . . . . . . . . . . . . . .98 Interrupts COP Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99 Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Table of Contents For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 11

... MC68HC705J1A — Rev. 4.0 For More Information On This Product, Section 8. External Interrupt Module (IRQ) Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 IRQ/V Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 PP Optional External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . 104 IRQ Status and Control Register . . . . . . . . . . . . . . . . . . . . . . 106 External Interrupt Timing ...

Page 12

... Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 MCU Order Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 Appendix A. MC68HRC705J1A Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 RC Oscillator Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 Typical Internal Operating Frequency for RC Oscillator Option 139 Package Types and Order Numbers . . . . . . . . . . . . . . . . . . . 140 Table of Contents For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 13

... B.6 C.1 C.2 C.3 C.4 C.5 C.6 C.7 MC68HC705J1A — Rev. 4.0 For More Information On This Product, Appendix B. MC68HSC705J1A Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 5.0-Volt DC Electrical Characteristics .142 3.3-Volt DC Electrical Characteristics .142 Typical Supply Currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142 Package Types and Order Numbers . . . . . . . . . . . . . . . . . . . 144 Appendix C ...

Page 14

... Freescale Semiconductor, Inc. Table of Contents Technical Data Table of Contents For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 15

... MC68HC705J1A — Rev. 4.0 For More Information On This Product, Title Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Pin Assignments .26 Bypassing Layout Recommendation . . . . . . . . . . . . . . . . . . 26 Crystal Connections with Oscillator Internal Resistor Mask Option . . . . . . . . . . . . . 28 Crystal Connections without Oscillator Internal Resistor Mask Option . . . . . . . . . . . . . 28 Ceramic Resonator Connections with Oscillator Internal Resistor Mask Option ...

Page 16

... IRQ Status and Control Register (ISCR 106 External Interrupt Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 107 Multifunction Timer Block Diagram .110 I/O Register Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 Timer Status and Control Register (TSCR 112 Timer Counter Register (TCR 114 List of Figures For More Information On This Product, Go to: www.freescale.com Page MC68HC705J1A — Rev. 4.0 ...

Page 17

... A-1 A-2 B-1 B-2 C-1 C-2 C-3 MC68HC705J1A — Rev. 4.0 For More Information On This Product, Title PA0–PA7, PB0–PB5 Typical High-Side Driver Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 123 PA0–PA3, PB0–PB5 Typical Low-Side Driver Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 123 PA4–PA7 Typical Low-Side Driver Characteristics . . . . . . 124 Typical Operating I (25 C) ...

Page 18

... Freescale Semiconductor, Inc. List of Figures Technical Data List of Figures For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 19

... A-1 B-1 C-1 MC68HC705J1A — Rev. 4.0 For More Information On This Product, Title Programmable Options Register/Memory Instructions Read-Modify-Write Instructions . . . . . . . . . . . . . . . . . . . . . . . 56 Jump and Branch Instructions . . . . . . . . . . . . . . . . . . . . . . . .58 Bit Manipulation Instructions Control Instructions Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Opcode Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 External Reset Timing ...

Page 20

... Freescale Semiconductor, Inc. List of Tables Technical Data List of Tables For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 21

... MC68HC705J1A — Rev. 4.0 For More Information On This Product, Section 1. General Description Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Programmable Options Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V and OSC1 and OSC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Ceramic Resonator Oscillator . . . . . . . . . . . . . . . . . . . . . 28 RC Oscillator ...

Page 22

... The MC68HRC705J1A is a resistor-capacitor (RC) oscillator mask option version of the MC68HC705J1A and is discussed in MC68HRC705J1A. A high-speed version of the MC68HC705J1A, the MC68HSC705J1A, is discussed in The MC68HSR705J1A, discussed high-speed version of the MC68HRC705J1A. A functional block diagram of the MC68HC705J1A is shown in Figure Technical Data Appendix B. MC68HSC705J1A. 1-1. General Description For More Information On This Product, Go to: www ...

Page 23

... Freescale Semiconductor, Inc. OSC1 INTERNAL OSCILLATOR OSC2 RESET IRQ/V PP MC68HC705J1A — Rev. 4.0 For More Information On This Product, 15-STAGE DIVIDE MULTIFUNCTION BY ³2 TIMER SYSTEM WATCHDOG AND ILLEGAL ADDRESS DETECT CPU CONTROL ALU 68HC05 CPU ACCUMULATOR CPU REGISTERS INDEX REGISTER STK PTR ...

Page 24

... Freescale Semiconductor, Inc. General Description 1.3 Features Features of the MC68HC705J1A include: • • • • • • • • • • • • Technical Data Peripheral modules: – 15-stage multifunction timer – Computer operating properly (COP) watchdog 14 bidirectional input/output (I/O) lines, including: – ...

Page 25

... Edge-sensitive only or edge- and level-sensitive Enabled or disabled Enabled or disabled Stop mode or halt mode Enabled or disabled Enabled or disabled Enabled or disabled shows the MC68HC705J1A pin assignments. are the power supply and ground pins. The MCU operates SS Figure 1-3 General Description Go to: www.freescale.com General Description ...

Page 26

... OSC2 2 PB5 3 PB4 4 PB3 5 PB2 6 PB1 7 PB0 Figure 1-2. Pin Assignments MCU C2 0 Figure 1-3. Bypassing Layout Recommendation General Description For More Information On This Product, Go to: www.freescale.com 20 RESET 19 IRQ PA0 17 PA1 16 PA2 15 PA3 14 PA4 13 PA5 12 PA6 PA7 MC68HC705J1A — Rev. 4.0 ...

Page 27

... An internal startup resistor of approximately programmable mask option. NOTE: Use an AT-cut crystal and not an AT-strip crystal because the MCU can overdrive an AT-strip crystal. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Figure 1-4 and Figure Figure 1-6 MC68HRC705J1A and Appendix C ...

Page 28

... MCU R 10 M¾ XTAL Figure 1-5. Crystal Connections without Oscillator Internal Resistor Mask Option Figure 1-6 and Figure 1-7 General Description For More Information On This Product, Go to: www.freescale.com OSC1 XTAL OSC2 OSC1 XTAL R OSC2 show ceramic resonator MC68HC705J1A — Rev. 4.0 ...

Page 29

... Mount the resonator and components as close as possible to the pins for startup stabilization and to minimize output distortion. An internal startup resistor of approximately provided between OSC1 and OSC2 as a programmable mask option MC68HC705J1A — Rev. 4.0 For More Information On This Product, MCU CERAMIC RESONATOR C3 ...

Page 30

... Figure 1-8. External Clock Connections pulls the RESET pin high. A steering diode between the RESET DD pins discharges any RESET pin voltage when power is DD for more information. General Description For More Information On This Product, Go to: www.freescale.com and Appendix C. MCU Section 4. MC68HC705J1A — Rev. 4.0 ...

Page 31

... I/O port. See for information on PA0–PA3 external interrupts. 1.9 PB0–PB5 These six I/O lines comprise port B, a general-purpose, bidirectional I/O port. MC68HC705J1A — Rev. 4.0 For More Information On This Product, and Section 8. External Interrupt Module for wired-OR operation. If the IRQ/V DD supply ...

Page 32

... Freescale Semiconductor, Inc. General Description Technical Data General Description For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 33

... Introduction This section describes the organization of the on-chip memory consisting of: • • MC68HC705J1A — Rev. 4.0 For More Information On This Product, Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Memory Map Input/Output Register Summary . . . . . . . . . . . . . . . . . . . . . . . .35 RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 EPROM/OTPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 EPROM/OTPROM Programming . . . . . . . . . . . . . . . . . . . . . 38 EPROM Programming Register . . . . . . . . . . . . . . . . . . . . . 39 EPROM Erasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 Mask Option Register ...

Page 34

... Timer Interrupt Vector High Timer Interrupt Vector Low External Interrupt Vector High External Interrupt Vector Low Software Interrupt Vector High Software Interrupt Vector Low Reset Vector High Reset Vector Low MC68HC705J1A — Rev. 4.0 $0000 $0001 $0002 $0003 $0004 $0005 $0006 ...

Page 35

... Reset: $0006 Unimplemented $0007 Unimplemented Read: Timer Status and Control $0008 Register (TSCR) Write: See page 112. Reset: Figure 2-2. I/O Register Summary (Sheet MC68HC705J1A — Rev. 4.0 For More Information On This Product, Bit PA7 PA6 PA5 PA4 Unaffected by reset 0 0 PB5 ...

Page 36

... TMR5 TMR4 IRQE PDIA7 PDIA6 PDIA5 PDIA4 PDIB5 PDIB4 Unimplemented R = Reserved Memory For More Information On This Product, Go to: www.freescale.com TMR3 TMR2 TMR1 IRQF IRQR PDIA3 PDIA2 PDIA1 PDIB3 PDIB2 PDIB1 ELAT MPGM MC68HC705J1A — Rev. 4.0 Bit 0 TMR0 PDIA0 0 PDIB0 0 EPGM 0 ...

Page 37

... CPU retrieves a byte from the stack. NOTE: Be careful when using nested subroutines or multiple interrupt levels. The CPU may overwrite data in the RAM during a subroutine or during the interrupt stacking operation. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Bit ...

Page 38

... Programming the EPROM/OTPROM with the M68HC705J Technical Data $0300–$07CF $07F8–$07FF, used for user-defined interrupt and reset vectors to program the EPROM/OTPROM on a byte-by-byte basis in-circuit simulator (M68HC705JICS) available from Freescale Memory For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 39

... Reset clears MPGM. EPGM — EPROM Programming Bit This read/write bit applies the voltage from the IRQ/V EPROM. To write the EPGM bit, the ELAT bit must be set already. Reset clears EPGM. MC68HC705J1A — Rev. 4.0 For More Information On This Product, $0018 Bit 7 6 ...

Page 40

... Port pulldown resistors (enable or disable) STOP instruction (stop mode or halt mode) Crystal oscillator internal resistor (enable or disable) EPROM security (enable or disable) Short oscillator delay (enable or disable) Memory For More Information On This Product, Go to: www.freescale.com , to the IRQ/V pin EPGM MC68HC705J1A — Rev. 4.0 ...

Page 41

... EPMSEC — EPROM Security Bit The EPMSEC bit controls access to the EPROM/OTPROM. OSCRES — Oscillator Internal Resistor Bit The OSCRES bit enables a 2-M circuit. NOTE: Program the OSCRES bit to logic 0 in devices using RC oscillators. MC68HC705J1A — Rev. 4.0 For More Information On This Product, $07F1 Bit ...

Page 42

... PA0–PA3 not enabled as external interrupt pins 1 = External interrupts triggered by active edges and active levels 0 = External interrupts triggered only by active edges 1 = COP watchdog enabled 0 = COP watchdog disabled Memory For More Information On This Product, Go to: www.freescale.com occurs after cyc MC68HC705J1A — Rev. 4.0 ...

Page 43

... Freescale Semiconductor, Inc. 2.8 EPROM Programming Characteristics Programming voltage IRQ/V Programming current IRQ/V Programming time Per array byte MOR MC68HC705J1A — Rev. 4.0 For More Information On This Product, (1) Symbol Characteristic EPGM t MPGM = 5.0 Vdc 10 Vdc – +105 Memory Go to: www.freescale.com Memory ...

Page 44

... Freescale Semiconductor, Inc. Memory Technical Data Memory For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 45

... MC68HC705J1A — Rev. 4.0 For More Information On This Product, Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 CPU Control Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Arithmetic/Logic Unit CPU Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Index Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Stack Pointer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Program Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 Condition Code Register . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Instruction Set .52 Addressing Modes ...

Page 46

... Condition code register (CCR) with five status flags 62 instructions Eight addressing modes Power-saving stop, wait, halt, and data-retention modes Central Processor Unit (CPU) For More Information On This Product, Go to: www.freescale.com Figure 3-1. MC68HC705J1A — Rev. 4.0 ...

Page 47

... Freescale Semiconductor, Inc. CPU CONTROL UNIT HALF-CARRY FLAG CARRY/BORROW FLAG MC68HC705J1A — Rev. 4.0 For More Information On This Product, ARITHMETIC/LOGIC UNIT INTERRUPT MASK NEGATIVE FLAG ZERO FLAG Figure 3-1. Programming Model Central Processor Unit (CPU) Go to: www.freescale.com Central Processor Unit (CPU) ...

Page 48

... Technical Data Accumulator Index register Stack pointer Program counter Condition code register Bit Unaffected by reset Figure 3-2. Accumulator (A) Bit Unaffected by reset Figure 3-3. Index Register (X) Central Processor Unit (CPU) For More Information On This Product, Go to: www.freescale.com Bit Bit 0 MC68HC705J1A — Rev. 4.0 ...

Page 49

... If subroutines and interrupts use more than 64 stack locations, the stack pointer wraps around to address $00FF and begins writing over the previously stored data. A subroutine uses two stack locations; an interrupt uses five locations. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Bit 15 ...

Page 50

... Technical Data Bit Loaded with vector from $07FE and $07FF Figure 3-5. Program Counter (PC) Bit Unimplemented Figure 3-6. Condition Code Register (CCR) Central Processor Unit (CPU) For More Information On This Product, Go to: www.freescale.com Unaffected MC68HC705J1A — Rev. 4.0 Bit 1 0 Bit ...

Page 51

... The CPU sets the carry/borrow flag when an addition operation produces a carry out of bit 7 of the accumulator or when a subtraction operation requires a borrow. Some logical operations and data manipulation instructions also clear or set the carry/borrow flag. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Central Processor Unit (CPU) Go to: www.freescale.com ...

Page 52

... Technical Data Inherent Immediate Direct Extended Indexed, no offset Indexed, 8-bit offset Indexed, 16-bit offset Relative Central Processor Unit (CPU) For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 53

... Indexed 8-bit offset instructions are useful for selecting the kth element in an n-element table. The table can begin anywhere within the first 256 memory locations and could extend as far as location 510 ($01FE). MC68HC705J1A — Rev. 4.0 For More Information On This Product, Central Processor Unit (CPU) Go to: www ...

Page 54

... When using the Freescale assembler, the programmer does not need to calculate the offset because the assembler determines the proper offset and verifies that it is within the span of the branch. Technical Data Central Processor Unit (CPU) For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 55

... These instructions operate on CPU registers and memory locations. Most of them use two operands. One operand is in either the accumulator or the index register. The CPU finds the other operand in memory. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Register/memory instructions Read-modify-write instructions ...

Page 56

... TST is an exception to the read-modify-write sequence because it does not write a replacement value. Central Processor Unit (CPU) For More Information On This Product, Go to: www.freescale.com Mnemonic ASL ASR (1) BCLR (1) BSET CLR COM DEC INC LSL LSR NEG ROL ROR (2) TST MC68HC705J1A — Rev. 4.0 ...

Page 57

... The CPU also transfers the tested bit to the carry/borrow bit of the condition code register. NOTE: Do not use BRCLR or BRSET instructions on registers with write-only bits. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Central Processor Unit (CPU) Go to: www.freescale.com Central Processor Unit (CPU) ...

Page 58

... Jump to subroutine Central Processor Unit (CPU) For More Information On This Product, Go to: www.freescale.com Mnemonic BCC BCS BEQ BHCC BHCS BHI BHS BIH BIL BLO BLS BMC BMI BMS BNE BPL BRA BRCLR BRN BRSET BSR JMP JSR MC68HC705J1A — Rev. 4.0 ...

Page 59

... CPU can also test and branch based on the state of any bit in any of the first 256 memory locations. NOTE: Do not use bit manipulation instructions on registers with write-only bits. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Table 3-4. Bit Manipulation Instructions Instruction ...

Page 60

... Transfer accumulator to index register Transfer index register to accumulator Stop CPU clock and enable interrupts Central Processor Unit (CPU) For More Information On This Product, Go to: www.freescale.com Mnemonic CLC CLI NOP RSP RTI RTS SEC SEI STOP SWI TAX TXA WAIT MC68HC705J1A — Rev. 4.0 ...

Page 61

... Clear Bit n BCS rel Branch if Carry Bit Set (Same as BLO) BEQ rel Branch if Equal BHCC rel Branch if Half-Carry Bit Clear BHCS rel Branch if Half-Carry Bit Set MC68HC705J1A — Rev. 4.0 For More Information On This Product, Description A (A) + (M) + (C) A (A) + (M) A (A) (M) ...

Page 62

... DIR (b0) 00 DIR (b1) 02 DIR (b2) 04 DIR (b3 — — — — DIR (b4) 08 DIR (b5) 0A DIR (b6) 0C DIR (b7) 0E DIR (b0) 10 DIR (b1) 12 DIR (b2) 14 DIR (b3 — — — — — DIR (b4) 18 DIR (b5) 1A DIR (b6) 1C DIR (b7) 1E MC68HC705J1A — Rev. 4 ...

Page 63

... EOR opr EXCLUSIVE OR Accumulator with Memory Byte EOR opr,X EOR opr,X EOR ,X INC opr INCA INCX Increment Byte INC opr,X INC ,X MC68HC705J1A — Rev. 4.0 For More Information On This Product, Description PC (PC push (PCL) SP (SP) – 1; push (PCH) SP (SP) – (PC) + rel ...

Page 64

... INH 58 b0 IX1 DIR 34 INH — — 0 INH 54 b0 IX1 (A) 0 — — — 0 INH 42 DIR 30 INH — — INH 50 IX1 — — — — — INH 9D IMM AA DIR BA EXT (M) — — — IX2 DA IX1 MC68HC705J1A — Rev. 4 ...

Page 65

... STX opr STX opr,X Store Index Register In Memory STX opr,X STX ,X SUB #opr SUB opr SUB opr Subtract Memory Byte from Accumulator SUB opr,X SUB opr,X SUB ,X MC68HC705J1A — Rev. 4.0 For More Information On This Product, Description $00FF SP (SP Pull (CCR) SP (SP ...

Page 66

... Relative program counter offset byte rr Relative program counter offset byte SP Stack pointer X Index register Z Zero flag # Immediate value Logical AND Logical OR Logical EXCLUSIVE Contents of –( ) Negation (two’s complement) Loaded with ? If : Concatenated with  Set or cleared — Not affected MC68HC705J1A — Rev. 4 ...

Page 67

... Freescale Semiconductor, Inc. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Central Processor Unit (CPU) Go to: www.freescale.com Central Processor Unit (CPU) Opcode Map Technical Data ...

Page 68

... Freescale Semiconductor, Inc. Central Processor Unit (CPU) Technical Data Central Processor Unit (CPU) For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 69

... Reset initializes the microcontroller unit (MCU) by returning the program counter to a known address and by forcing control and status bits to known states. Interrupts temporarily change the sequence of program execution to respond to events that occur during processing. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Section 4. Resets and Interrupts Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Resets Power-On Reset ...

Page 70

... Computer operating properly (COP) watchdog Illegal address ILLEGAL ADDRESS COP WATCHDOG POWER-ON RESET V DD INTERNAL CLOCK Figure 4-1. Reset Sources Resets and Interrupts For More Information On This Product, Go to: www.freescale.com TO CPU AND RST S PERIPHERAL D Q MODULES CK RESET LATCH MC68HC705J1A — Rev. 4.0 ...

Page 71

... DATA BUS Notes: 1. Power-on reset threshold is typically between 1 V and Internal clock, internal address bus, and internal data bus are not available externally. MC68HC705J1A — Rev. 4.0 For More Information On This Product, pin generates a power-on reset. DD (internal clock cycle) delay after the oscillator becomes ...

Page 72

... Table 4-1. External Reset Timing Characteristic Resets and Interrupts For More Information On This Product, Go to: www.freescale.com generates an external cyc $07FE $07FE $07FF NEW PC NEW PC NEW NEW OP DUMMY PCH PCL CODE Symbol Min Max t 1.5 — RL MC68HC705J1A — Rev. 4.0 Unit t cyc ...

Page 73

... If the IRQ latch is set, the CPU then tests the I bit in the condition code register. If the I bit is clear, the CPU then begins the interrupt sequence. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Software interrupt (SWI) instruction External interrupt pins: – ...

Page 74

... Resets and Interrupts For More Information On This Product, Go to: www.freescale.com pin can latch another interrupt PP pin interrupt logic BIH & BIL INSTRUCTION PROCESSING IRQF EXTERNAL IRQ D Q INTERRUPT LATCH REQUEST CK IRQE CLR 4-5, is latched as long as any source MC68HC705J1A — Rev. 4.0 ...

Page 75

... Interrupt pulse width low (edge-triggered) Interrupt pulse period The minimum, t plus 19 Interrupt pulse width low (edge-triggered) Interrupt pulse period The minimum, t plus 19 MC68HC705J1A — Rev. 4.0 For More Information On This Product, t ILIL t ILIH t ILIH Table 4-2. External Interrupt Timing (V Characteristic = 5.0 Vdc 10 Vdc – ...

Page 76

... Loads the program counter with the contents of the appropriate interrupt vector locations: – $07FC and $07FD (software interrupt vector) – $07FA and $07FB (external interrupt vector) – $07F8 and $07F9 (timer interrupt vector) Resets and Interrupts For More Information On This Product, Go to: www.freescale.com Figure 4-6. MC68HC705J1A — Rev. 4.0 ...

Page 77

... STACKING ORDER Function Reset Software interrupt (SWI) External interrupt Timer interrupts 1. The COP watchdog is programmable in the mask option register. MC68HC705J1A — Rev. 4.0 For More Information On This Product, • UNSTACKING ORDER • • 1 CONDITION CODE REGISTER 2 ACCUMULATOR 3 INDEX REGISTER 4 PROGRAM COUNTER (HIGH BYTE) ...

Page 78

... LOAD PC WITH INTERRUPT VECTOR FETCH NEXT INSTRUCTION SWI YES INSTRUCTION? NO RTI YES INSTRUCTION? NO Figure 4-7. Interrupt Flowchart Resets and Interrupts For More Information On This Product, Go to: www.freescale.com CLEAR IRQ LATCH STACK PC CCR SET I BIT UNSTACK CCR EXECUTE INSTRUCTION MC68HC705J1A — Rev. 4.0 ...

Page 79

... Introduction The microcontroller unit (MCU) can enter these low-power standby modes: • • • MC68HC705J1A — Rev. 4.0 For More Information On This Product, Section 5. Low-Power Modes Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Exiting Stop and Wait Modes . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Effects of Stop and Wait Modes . . . . . . . . . . . . . . . . . . . . . . . .81 Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81 CPU ...

Page 80

... A external interrupt pin starts the CPU clock and loads the program counter with the contents of locations $07FA and $07FB. Low-Power Modes For More Information On This Product, Go to: www.freescale.com voltages as low DD pin or PP pin or PP MC68HC705J1A — Rev. 4.0 ...

Page 81

... The WAIT instruction disables the CPU clock. After exiting wait mode, the CPU clock and all enabled peripheral clocks immediately begin running. MC68HC705J1A — Rev. 4.0 For More Information On This Product, COP watchdog reset — A timeout of the COP watchdog resets the MCU, starts the CPU clock, and loads the program counter with the contents of locations $07FE and $07FF ...

Page 82

... Disables the CPU clock Clears the interrupt mask (I bit) in the condition code register, enabling interrupts Disables the CPU clock Clears the COP watchdog counter Disables the COP watchdog clock Low-Power Modes For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 83

... After exiting stop mode by reset and after the oscillator stabilization delay, the timer resumes operation from its reset state. The WAIT instruction: The WAIT instruction has no effect on the timer. MC68HC705J1A — Rev. 4.0 For More Information On This Product, The COP watchdog counter immediately begins counting from $0000. ...

Page 84

... To take the MCU out of data-retention mode: 1. Return V 2. Return the RESET pin to logic 1. Technical Data voltage. The RESET pin must remain low DD continuously during data-retention mode. to normal operating voltage. DD Low-Power Modes For More Information On This Product, Go to: www.freescale.com voltages as low as 2.0 Vdc. DD MC68HC705J1A — Rev. 4.0 ...

Page 85

... Internal clocking from OSC1 pin 2. Edge-triggered external interrupt mask option 3. Edge- and level-triggered external interrupt mask option 4. Reset vector shown as example Figure 5-1. Stop Mode Recovery Timing MC68HC705J1A — Rev. 4.0 For More Information On This Product, OSCILLATOR STABILIZATION DELAY $07FE $07FE ...

Page 86

... Figure 5-2. Stop/Halt/Wait Flowchart Low-Power Modes For More Information On This Product, Go to: www.freescale.com WAIT CLEAR I BIT IN CCR SET IRQE BIT IN ISCR TURN OFF CPU CLOCK TIMER CLOCK ACTIVE YES EXTERNAL RESET? NO YES EXTERNAL INTERRUPT? NO YES TIMER INTERRUPT? NO YES COP RESET? NO MC68HC705J1A — Rev. 4.0 ...

Page 87

... Connect any unused I/O pins to an appropriate logic level, either V V Although the I/O ports do not require termination for proper SS. operation, termination reduces excess current consumption and the possibility of electrostatic damage. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Port Port A Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 Data Direction Register Pulldown Register A ...

Page 88

... Unimplemented Parallel Input/Output (I/O) Ports For More Information On This Product, Go to: www.freescale.com PA3 PA2 PA1 PB3 PB2 PB1 DDRA3 DDRA2 DDRA1 DDRB3 DDRB2 DDRB1 PDIA3 PDIA2 PDIA1 PDIB3 PDIB2 PDIB1 MC68HC705J1A — Rev. 4.0 Bit 0 PA0 PB0 DDRA0 0 DDRB0 0 PDIA0 0 PDIB0 0 ...

Page 89

... PA[7:0] — Port A Data Bits These read/write bits are software programmable. Data direction of each port A pin is under the control of the corresponding bit in data direction register A. Reset has no effect on port A data. MC68HC705J1A — Rev. 4.0 For More Information On This Product, $0000 Bit 7 ...

Page 90

... RESET Figure 6-4. Port A I/O Circuitry Parallel Input/Output (I/O) Ports For More Information On This Product, Go to: www.freescale.com DDRA3 DDRA2 DDRA1 10-mA SINK CAPABILITY (PINS PA4–PA7 ONLY) PAx (PA0–PA3 TO IRQ MODULE) 100- A PULLDOWN SWPDI MC68HC705J1A — Rev. 4.0 Bit 0 DDRA0 0 ...

Page 91

... A pins as inputs with disabled pulldown devices. Address: Read: Write: Reset: PDIA[7:0] — Pulldown Inhibit A Bits PDIA[7:0] disable the port A pulldown devices. Reset clears PDIA[7:0]. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Table 6-1. Port A Pin Operation I/O Pin Mode 0 Input, high-impedance 1 Output ...

Page 92

... B. Reset has no effect on port B data. Technical Data . SS (IRQ). $0001 Bit PB5 PB4 Unaffected by reset = Unimplemented Figure 6-6. Port B Data Register (PORTB) Parallel Input/Output (I/O) Ports For More Information On This Product, Go to: www.freescale.com Section PB3 PB2 PB1 MC68HC705J1A — Rev. 4.0 Bit 0 PB0 ...

Page 93

... These read/write bits control port B data direction. Reset clears DDRB[5:0], configuring all port B pins as inputs. NOTE: Avoid glitches on port B pins by writing to the port B data register before changing data direction register B bits from Figure 6-8 MC68HC705J1A — Rev. 4.0 For More Information On This Product, $0005 Bit ...

Page 94

... Corresponding port B pulldown device disabled 0 = Corresponding port B pulldown device not disabled Parallel Input/Output (I/O) Ports For More Information On This Product, Go to: www.freescale.com Table 6-2 summarizes the operation Accesses to Data Bit Read Write Pin Latch Latch Latch PDIB3 PDIB2 PDIB1 MC68HC705J1A — Rev. 4.0 (1) Bit 0 PDIB0 0 ...

Page 95

... I/O ports hi-z leakage current PA0–PA7, PB0–PB5 (without individual pulldown activated) Input pulldown current PA0–PA7, PB0–PB5 (with individual pulldown activated 3.3 Vdc 10 Vdc Typical values reflect average measurements at midpoint of voltage range MC68HC705J1A — Rev. 4.0 For More Information On This Product, (1) Symbol ...

Page 96

... Freescale Semiconductor, Inc. Parallel Input/Output (I/O) Ports Technical Data Parallel Input/Output (I/O) Ports For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 97

... COP watchdog and prevents COP reset. The COP watchdog function is programmable by the COPEN bit in the mask option register. Features include: • • MC68HC705J1A — Rev. 4.0 Computer Operating Properly (COP) Module For More Information On This Product, Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 COP Watchdog Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 COP Watchdog Timeout Period ...

Page 98

... To clear the COP watchdog and prevent a COP reset, write a logic 0 to bit 0 (COPC) of the COP register at location $07F0 (see Technical Data and V . Periodically clearing the counter starts SS DD Computer Operating Properly (COP) Module For More Information On This Product, Go to: www.freescale.com PP Module. Figure 7-1). MC68HC705J1A — Rev. 4.0 pin ...

Page 99

... Write: Reset: COPC — COP Clear Bit This write-only bit resets the COP watchdog. Reading address $07F0 returns undefined results. MC68HC705J1A — Rev. 4.0 Computer Operating Properly (COP) Module For More Information On This Product, Computer Operating Properly (COP) Module pin voltage. ...

Page 100

... The counter begins counting from $0000. The counter is not cleared again after the oscillator stabilization delay and continues counting throughout the oscillator stabilization delay. Computer Operating Properly (COP) Module For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 101

... The external interrupt (IRQ) module provides asynchronous external interrupts to the CPU. These sources can generate external interrupts: • • Features include: • • • MC68HC705J1A — Rev. 4.0 For More Information On This Product, Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 IRQ/V Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 PP Optional External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . 104 IRQ Status and Control Register ...

Page 102

... LEVEL BIT IRQ D Q LATCH CK CLR RESET IRQ VECTOR FETCH IRQR External Interrupt Module (IRQ) For More Information On This Product, Go to: www.freescale.com ) and port A PP Figure 8-2 TO BIH & BIL INSTRUCTION PROCESSING IRQF EXTERNAL INTERRUPT REQUEST IRQE MC68HC705J1A — Rev. 4.0 ...

Page 103

... Freescale Semiconductor, Inc. MC68HC705J1A — Rev. 4.0 For More Information On This Product, FROM RESET YES I BIT SET? NO YES EXTERNAL INTERRUPT? NO TIMER YES INTERRUPT? STACK PCL, PCH CCR NO LOAD PC WITH INTERRUPT VECTOR FETCH NEXT INSTRUCTION SWI YES INSTRUCTION? NO RTI YES INSTRUCTION? UNSTACK CCR PCH, PCL ...

Page 104

... Schmitt trigger as part of its input PP pin except for the inverted phase (logic 1, rising edge). The PP pin is a logic 0 (falling edge). PP External Interrupt Module (IRQ) For More Information On This Product, Go to: www.freescale.com pin latches an external interrupt input requires an PP pin is not MC68HC705J1A — Rev. 4.0 ...

Page 105

... Schmitt triggers. The interrupt mask bit (I) in the condition code register (CCR) disables all maskable interrupt requests, including external interrupt requests. MC68HC705J1A — Rev. 4.0 For More Information On This Product, External Interrupt Module (IRQ) Go to: www.freescale.com ...

Page 106

... No effect on external interrupt and IRQF bit 1 = External interrupt request pending external interrupt request pending 1 = External interrupt requests enabled 0 = External interrupt requests disabled External Interrupt Module (IRQ) For More Information On This Product, Go to: www.freescale.com IRQF IRQR Reserved MC68HC705J1A — Rev. 4.0 Bit ...

Page 107

... The minimum should not be less than the number of interrupt service routine cycles plus 19 ILIL MC68HC705J1A — Rev. 4.0 For More Information On This Product, t ILIL t ILIH t ILIH (1) = – +105 C unless otherwise noted A (1) = – +105 C, unless otherwise noted ...

Page 108

... Freescale Semiconductor, Inc. External Interrupt Module (IRQ) Technical Data External Interrupt Module (IRQ) For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 109

... The multifunction timer provides a timing reference with programmable real-time interrupt (RTI) capability. organization. Features include: • • • MC68HC705J1A — Rev. 4.0 For More Information On This Product, Section 9. Multifunction Timer Module Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 Interrupts 112 I/O Registers 112 Timer Status and Control Register . . . . . . . . . . . . . . . . . . .112 Timer Counter Register ...

Page 110

... TIMER COUNTER REGISTER BITS [0:7] OF 15-STAGE RIPPLE COUNTER RESET TIMER STATUS/CONTROL REGISTER RTI RATE SELECT BITS [8:14] OF 15-STAGE RIPPLE COUNTER 8 Multifunction Timer Module For More Information On This Product, Go to: www.freescale.com RESET INTERNAL CLOCK 4 (XTAL 2) INTERRUPT REQUEST RESET COP RESET MC68HC705J1A — Rev. 4.0 ...

Page 111

... RT0 bits in the timer status and control register at address $0008 allow a timer interrupt every 16,384, 32,768, 65,536, or 131,072 clock cycles. The last four stages drive the selectable COP system. For information on the COP, refer to the Properly (COP) MC68HC705J1A — Rev. 4.0 For More Information On This Product, Bit ...

Page 112

... Resets timer interrupt flags Selects real-time interrupt rates $0008 Bit TOF RTIF TOIE RTIE Unimplemented Figure 9-3. Timer Status and Control Register (TSCR) Multifunction Timer Module For More Information On This Product, Go to: www.freescale.com RT1 TOFR RTIFR MC68HC705J1A — Rev. 4.0 Bit 0 RT0 1 ...

Page 113

... COP watchdog. Reset sets RT1 and RT0. NOTE: Changing RT1 and RT0 when a COP timeout is imminent can cause a real-time interrupt request to be missed or an additional real-time MC68HC705J1A — Rev. 4.0 For More Information On This Product Timer overflow interrupts enabled 0 = Timer overflow interrupts disabled ...

Page 114

... Unimplemented Figure 9-4. Timer Counter Register (TCR) Multifunction Timer Module For More Information On This Product, Go to: www.freescale.com Number COP Timeout of Cycles (1) Period to COP Reset 17 65 131,072 18 131 262,144 19 262 524,288 20 524 1,048,576 TMR3 TMR2 TMR1 MC68HC705J1A — Rev. 4.0 (1) Bit 0 TMR0 0 ...

Page 115

... Wait Mode The timer remains active after a WAIT instruction. Any enabled timer interrupt request can bring the MCU out of wait mode. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Clears the timer counter Clears interrupt flags (TOF and RTIF) and interrupt enable bits (TOFE and RTIE) in TSCR, removing any pending timer interrupt requests and disabling further timer interrupts ...

Page 116

... Freescale Semiconductor, Inc. Multifunction Timer Module Technical Data Multifunction Timer Module For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 117

... EPROM Programming Characteristics . . . . . . . . . . . . . . . . . . 126 10.12 5.0-Volt Control Timing 10.13 3.3-Volt Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 10.2 Introduction This section contains electrical and timing specifications. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Section 10. Electrical Specifications Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 Operating Temperature Range 119 Thermal Characteristics ...

Page 118

... PA4–PA7 pin 10.7 5.0-Volt DC Electrical Characteristics Electrical Specifications For More Information On This Product, Go to: www.freescale.com and V within the range Out Value V –0 – – –65 to +150 STG and for guaranteed operating MC68HC705J1A — Rev. 4.0 Unit ...

Page 119

... C = extended temperature range automotive temperature range 10.5 Thermal Characteristics Thermal resistance MC68HC705J1AP MC68HC705J1ADW MC68HC705J1AS plastic dual in-line package (PDIP small outline integrated circuit (SOIC ceramic DIP (cerdip) MC68HC705J1A — Rev. 4.0 For More Information On This Product, Package Type (1) (2) ( (4) P, CDW, CS ...

Page 120

... P I 273 273 Using this value of K, the values Electrical Specifications For More Information On This Product, Go to: www.freescale.com , in C can be obtained from and can be neglected. and T is approximately (at equilibrium) for a D and T can be obtained MC68HC705J1A — Rev. 4.0 (1) (2) (3) ...

Page 121

... MHz); all inputs 0.2 V from rail loads; less than all outputs; C osc 5. Stop mode I is measured with OSC1 = – 0 Only input high current rated RESET. 7. The R value selected for RC oscillator versions of this device is unspecified. See osc additional information. MC68HC705J1A — Rev. 4.0 For More Information On This Product, (1) Symbol ...

Page 122

... MHz); all inputs 0.2 V from rail loads; is measured using external square wave OSC2 Appendix C. MC68HSR705J1A MC68HC705J1A — Rev. 4.0 Unit 0.2 V; for ...

Page 123

... Notes 5.0 V, devices are specified and tested for 3.3 V, devices are specified and tested for V DD Figure 10-2. PA0–PA3, PB0–PB5 Typical Low-Side Driver Characteristics MC68HC705J1A — Rev. 4.0 For More Information On This Product, 800 mV 700 mV 600 mV 500 mV 400 mV 300 mV ...

Page 124

... V, devices are specified and tested for V DD Figure 10-3. PA4–PA7 Typical Low-Side Driver Characteristics Technical Data 800 mV 700 mV 600 mV 500 mV 400 mV 300 mV 200 5 100 400 300 Electrical Specifications For More Information On This Product, Go to: www.freescale.com 10.0 mA 5.0 mA. OL MC68HC705J1A — Rev. 4.0 ...

Page 125

... Freescale Semiconductor, Inc. 10.10 Typical Supply Currents Notes Notes MC68HC705J1A — Rev. 4.0 For More Information On This Product, 6.0 mA 5.0 mA 4.0 mA 3.0 mA 2.0 mA 3.6 V 1 1.0 MHz INTERNAL OPERATING FREQUENCY (f = 5.0 V, devices are specified and tested for 3.3 V, devices are specified and tested for I DD Figure 10-4 ...

Page 126

... RL t 1.5 — ILIH (2) t 1.5 Note ILIL t 1.5 — IHIL (2) t 1.5 Note IHIH 200 — MC68HC705J1A — Rev. 4.0 Unit Unit MHz MHz ns t cyc t cyc t cyc t cyc t cyc ns ...

Page 127

... The maximum width should not be more than the number of cycles it takes to execute the interrupt service ILIL ILIH routine plus the interrupt service routine will be re-entered. cyc MC68HC705J1A — Rev. 4.0 For More Information On This Product, (1) Symbol – +105 C, unless otherwise noted A Electrical Specifications Go to: www ...

Page 128

... Reset vector shown as example Figure 10-7. Stop Mode Recovery Timing Technical Data t ILIL t ILIH t ILIH 4064 t cyc 07FE 07FE 07FE (NOTE 4) Electrical Specifications For More Information On This Product, Go to: www.freescale.com 07FE 07FE 07FF RESET OR INTERRUPT VECTOR FETCH MC68HC705J1A — Rev. 4.0 ...

Page 129

... Internal clock, internal address bus, and internal data bus are not available externally. 2. The next rising edge of the internal clock after the rising edge of RESET initiates the reset sequence. Figure 10-9. External Reset Timing MC68HC705J1A — Rev. 4.0 For More Information On This Product, 4064 t ...

Page 130

... Freescale Semiconductor, Inc. Electrical Specifications Technical Data Electrical Specifications For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 131

... Freescale Semiconductor, Inc. Technical Data — MC68HC705J1A 11.1 Contents 11.2 11.3 11.4 11.5 11.2 Introduction The MC68HC705J1A, the resistor-capacitor (RC) oscillator, and high-speed option devices described in MC68HRC705J1A, MC68HSR705J1A • • • MC68HC705J1A — Rev. 4.0 For More Information On This Product, Section 11. Mechanical Specifications Introduction ...

Page 132

... C 2.35 2.65 0.093 0.104 D 0.35 0.49 0.014 0.019 F 0.50 0.90 0.020 0.035 X 45 1.27 BSC 0.050 BSC G J 0.25 0.32 0.010 0.012 K 0.10 0.25 0.004 0.009 10.05 10.55 0.395 0.415 R 0.25 0.75 0.010 0.029 MC68HC705J1A — Rev. 4.0 7 ...

Page 133

... Freescale Semiconductor, Inc. 11.5 Ceramic Dual In-Line Package (Case 732 SEATING PLANE MC68HC705J1A — Rev. 4.0 For More Information On This Product, Ceramic Dual In-Line Package (Case 732 Mechanical Specifications Go to: www.freescale.com Mechanical Specifications NOTES: 1. LEADS WITHIN 0.010 DIAMETER, TRUE POSITION AT SEATING PLANE, AT MAXIMUM MATERIAL CONDITION ...

Page 134

... Freescale Semiconductor, Inc. Mechanical Specifications Technical Data Mechanical Specifications For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 135

... Freescale Semiconductor, Inc. Technical Data — MC68HC705J1A 12.1 Contents 12.2 12.3 12.2 Introduction This section contains ordering information for the available package types. 12.3 MCU Order Numbers Table 12-1 Package Type PDIP SOIC Cerdip 1. Refer to Appendix C. MC68HSR705J1A resistor-capacitor oscillator devices Plastic dual in-line package (PDIP) 3 ...

Page 136

... Freescale Semiconductor, Inc. Ordering Information Technical Data Ordering Information For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 137

... A.3 A.4 A.5 A.2 Introduction This appendix introduces the MC68HRC705J1A, a resistor-capacitor (RC) oscillator mask option version of the MC68HC705J1A. All of the information in this document applies to the MC68HRC705J1A with the exceptions given in this appendix. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Appendix A. MC68HRC705J1A Introduction ...

Page 138

... Technical Data Figure A-1 MCU R Figure A-1. RC Oscillator Connections MC68HRC705J1A For More Information On This Product, Go to: www.freescale.com to drive the on-chip oscillator. Mount OSC1 R OSC2 Figure A-1. For such MC68HC705J1A — Rev. 4.0 ...

Page 139

... Figure A-2. Typical Internal Operating Frequency for Various V MC68HC705J1A — Rev. 4.0 For More Information On This Product, Typical Internal Operating Frequency for RC Oscillator Option shows typical internal operating frequencies for the 100 1000 RESISTANCE ( — RC Oscillator Option Only DD MC68HRC705J1A Go to: www ...

Page 140

... C –40 to +105 732-03 20 –40 to +85 C –40 to +105 C Section 12. Ordering Information MC68HRC705J1A For More Information On This Product, Go to: www.freescale.com (1) Order Number MC68HRC705J1AP MC68HRC705J1AC (4) MC68HRC705J1AV MC68HRC705J1ADW MC68HRC705J1ACDW MC68HRC705J1AVDW MC68HRC705J1AS MC68HRC705J1ACS MC68HRC705J1AVS for standard part ordering information. MC68HC705J1A — Rev. 4.0 (2) ( (5) (6) ...

Page 141

... B.4 B.5 B.6 B.2 Introduction This appendix introduces the MC68HSC705J1A, a high-speed version of the MC68HC705J1A. All of the information in this document applies to the MC68HSC705J1A with the exceptions given in this appendix. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Appendix B. MC68HSC705J1A Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 5 ...

Page 142

... For More Information On This Product, Go to: www.freescale.com Symbol Min Typ Max I — 4.25 7.0 DD 0.57 3.25 Symbol Min Typ Max I — 1.4 4.25 DD 0.28 1.75 SEE NOTE 1 5.5 V 4.5 V 3.6 V 3.0 V 2.0 MHz 3.0 MHz 4.0 MHz ) OP ( MC68HC705J1A — Rev. 4.0 Unit mA Unit mA ...

Page 143

... Freescale Semiconductor, Inc. MC68HC705J1A — Rev. 4.0 For More Information On This Product, 700 A 600 A 500 A 400 A 300 A 200 A 100 1.0 MHz 2.0 MHz INTERNAL OPERATING FREQUENCY (f Notes 5.0 V, high-speed devices are specified and tested for 4.0 MHz 3.3 V, high-speed devices are specified and tested for ...

Page 144

... Temperature 738-03 20 –40 to +85 C 751D-04 20 –40 to +85 C 732-03 20 –40 to +85 C Section 12. Ordering Information MC68HSC705J1A For More Information On This Product, Go to: www.freescale.com Order Number MC68HSC705J1AP MC68HSC705J1AC MC68HSC705J1ADW MC68HSC705J1ACDW MC68HSC705J1AS MC68HSC705J1ACS for standard part ordering information. MC68HC705J1A — Rev. 4.0 (1) (2) (3) P (4) (5) ...

Page 145

... MC68HRC705J1A. All of the information in this document applies to the MC68HSR705J1A with the exceptions given in this appendix. C.3 RC Oscillator Connections (External Resistor) Refer to resistor-capacitor (RC) oscillator connections with external resistor. MC68HC705J1A — Rev. 4.0 For More Information On This Product, Appendix C. MC68HSR705J1A Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145 RC Oscillator Connections (External Resistor 145 Typical Internal Operating Frequency for High-Speed RC Oscillator Option ...

Page 146

... Technical Data RESISTANCE (k ) Figure C-1. Typical Internal Operating Frequency for High-Speed RC Oscillator Option MC68HSR705J1A For More Information On This Product, Go to: www.freescale.com 3.0 V 3.6 V 4.5 V 5 100 Appendix A. MC68HC705J1A — Rev. 4.0 ...

Page 147

... When programming the OSCRES bit for the MC68HSR705J1A, an internal resistor is selected which yields typical internal oscillator frequencies as shown in device is different than the resistance of the selectable internal resistor on the MC68HC705J1A and the MC68HSC705J1A devices. NOTE: This option is not available on the ROM version of this device (MC68HC05J1A). ...

Page 148

... However, this data is not guaranteed the user’s responsibility to ensure that the resulting internal operating frequency meets the user’s requirements. Technical Data 50 TEMPERATURE ( C) MC68HSR705J1A For More Information On This Product, Go to: www.freescale.com 3.0 V 3.6 V 4.5 V 5.0 V 5.5 V 100 150 MC68HC705J1A — Rev. 4.0 ...

Page 149

... PDIP SOIC Cerdip 1. Refer plastic dual in-line package (PDIP extended temperature range small outline integrated circuit (SOIC ceramic dual in-line package (cerdip) MC68HC705J1A — Rev. 4.0 For More Information On This Product, Table C-1 MC68HSR705J1A (High-Speed . RC Oscillator Option) Order Numbers Case Pin ...

Page 150

... Freescale Semiconductor, Inc. MC68HSR705J1A Technical Data MC68HSR705J1A For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 151

... COP in wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . COP register (COPR COP reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . programmable option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . COPEN bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . instruction set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . instruction set summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . instruction types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . opcode map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . programming model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MC68HC705J1A — Rev. 4.0 For More Information On This Product Index Go to: www.freescale.com Index ...

Page 152

... EPGM bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EPMSEC bit EPROM EPROM security programmable option . . . . . . . . . . . . . . . . . . . . EPROM/OTPROM erasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38, programming characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . programming register (EPROG Technical Data Index For More Information On This Product, Go to: www.freescale.com D E MC68HC705J1A — Rev. 4 117 127 122 123 118 142 145 119 ...

Page 153

... IRQ module block diagram IRQ status and control register (ISCR IRQ/V operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . optional external interrupts pin sensitivity selection pin triggering option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . port A external interrupts programmable option MC68HC705J1A — Rev. 4.0 For More Information On This Product pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101, PP Index Go to: www.freescale.com ...

Page 154

... STOP instruction flowchart stop mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79, stop recovery timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . timing of stop mode recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . wait mode Technical Data pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31, 98, PP Index For More Information On This Product, Go to: www.freescale.com J L MC68HC705J1A — Rev. 4 112 76 73 104 106 106 106 120 42 ...

Page 155

... RC oscillator connections mechanical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EPROM/OTPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EPROM/OTPROM programming . . . . . . . . . . . . . . . . . . . . . . . . . features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I/O register summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . mask option register memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MPGM bit multifunction timer module bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MC68HC705J1A — Rev. 4.0 For More Information On This Product Index Go to: www.freescale.com Index 137 139 140 140 ...

Page 156

... I/O circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I/O pin interrupts (PA0–PA3 LED drive capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . pin operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . pins pulldown register (PDRA port B data direction register (DDRB electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Technical Data Index For More Information On This Product, Go to: www.freescale.com O P MC68HC705J1A — Rev. 4 135 140 144 149 149 ...

Page 157

... COP watchdog reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . external reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . external reset timing illegal address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . power-on reset (POR power-on reset timing reset sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . reset/interrupt vector addresses resistors (pulldown) programmable option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RT1, RT0 bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MC68HC705J1A — Rev. 4.0 For More Information On This Product, R Index Go to: www.freescale.com Index ...

Page 158

... TOF bit TOFR bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TOIE bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Technical Data Index For More Information On This Product, Go to: www.freescale.com S T MC68HC705J1A — Rev. 4.0 113 113 113 105 41 49 106 100 100 115 86 ...

Page 159

... Freescale Semiconductor, Inc. V pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DD V pin WAIT instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81, 100, wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . effects on timer bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MC68HC705J1A — Rev. 4.0 For More Information On This Product Index Go to: www.freescale.com Index 25 25 106 100 115 51 Technical Data ...

Page 160

... Freescale Semiconductor, Inc. Index Technical Data Index For More Information On This Product, Go to: www.freescale.com MC68HC705J1A — Rev. 4.0 ...

Page 161

... Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com ...

Page 162

... Freescale Semiconductor was negligent regarding the design or manufacture of the part. MC68HC705J1A/D Go to: www.freescale.com ...

Related keywords