MAX3100 Maxim Integrated Products, MAX3100 Datasheet
MAX3100
Specifications of MAX3100
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MAX3100 Summary of contents
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... This device also includes a flexible interrupt with four maskable sources, including address recognition on 9-bit networks. Two hardware-handshak- ing control lines are included (one input and one output). The MAX3100 is available in 14-pin plastic DIP and small, 16-pin QSOP packages in the commercial and extended temperature ranges. ________________________Applications ...
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... QSOP (derate 8.30mW/°C above +70°C) .....................667mW CC Operating Temperature Ranges + 0.3V) MAX3100C_ _ ......................................................0°C to +70°C CC MAX3100E_ _ ...................................................-40°C to +85°C Storage Temperature Range ............................ -65°C to +160°C Lead Temperature (soldering, 10sec) ............................ +300°C , unless otherwise noted. Typical values are measured at 9600 baud at T CONDITIONS ...
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... Output Rise Time t r Output Fall Time t f Note 1: t and t specify the minimum separation between SCLK rising edges used to write to other devices on the SPI bus CS0 CS1 and the CS used to select the MAX3100. A separation greater than CSS t CSH SCLK ...
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SPI/Microwire-Compatible UART in QSOP-16 __________________________________________Typical Operating Characteristics (T = +25°C, unless otherwise noted.) A SUPPLY CURRENT vs. TEMPERATURE 1000 1.8432MHz CRYSTAL 900 TRANSMITTING AT 115.2 kbps 800 700 600 500 400 300 V = 3.3V CC ...
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... The transmitter section accepts SPI/Microwire data, for- mats it, and transmits it in asynchronous serial format from the TX output. Data is loaded into the transmit- buffer register from the SPI/Microwire interface. The MAX3100 adds start and stop bits to the data and clocks the data out at the selected baud rate (Table 7). 5 ...
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SPI/Microwire-Compatible UART in QSOP-16 (SOURCES RA/FE (MASKS) TRANSMIT-DONE (TM) DATA-RECEIVED (RM) INTERRUPT IRQ LOGIC PARITY (PM) FRAMING ERROR (RAM)/ RECEIVE ACTIVITY Figure 2. Functional Diagram 6 _______________________________________________________________________________________ Pt TX-BUFFER REGISTER TX-SHIFT REGISTER Pt D0t–D7t SHDN DIN B0 ...
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... Figure 4. SPI Interface (Write Configuration) The receiver section receives data in serial form. The MAX3100 detects a start bit on a high-to-low RX transi- tion (Figure 3). An internal clock samples data at 16 times the data rate. The start bit can occur as much as one clock cycle before it is detected, as indicated by the shaded portion ...
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... _______________________________________________________________________________________ MAX3100. The device enters test mode if bit this mode the RTS pin acts as the 16x clock Write Operations generator’s output. This may be useful for direct baud- rate generation (in this mode, TX and RX are in digital loopback). Normally, the write-data register loads the TX-buffer register. To change the RTS pin’ ...
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... Parity-Enable Bit. Appends the Pt bit to the transmitted data when and sends the Pt bit as written. No parity bit is transmitted when With extra bit is expected received. This data is put into the Pr register when The MAX3100 does not calculate parity Reads the value of the Parity-Enable bit ...
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SPI/Microwire-Compatible UART in QSOP-16 Table 5. Bit Descriptions (continued) BIT READ/ POR NAME WRITE STATE Receiver-Activity/Framing-Error Bit. In shutdown mode, this is the RA bit. In normal operation, this is the FE bit. In shutdown mode, a transition on RX ...
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... This is the RA (RX-transition) bit in shutdown, and the FE (framing-error) bit in operating mode set if there has been a transition on RX since entering shutdown cleared when the MAX3100 exits shutdown. IRQ is asserted when RA is set and RAM = determined solely by the currently received data, and is not stored in FIFO. ...
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... Information 76.8k 38.4k Figure 7 shows the MAX3100 in an isolated serial inter- 19.2k face. The MAX3100 Schmitt-trigger inputs are driven 9600 directly by opto-coupler outputs. Isolated power is pro- 4800 vided by the MAX845 transformer driver and linear reg- 2400 ulator shown ...
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... DOUT 470Ω SCLK 2k DIN 470Ω CS MAX253 TRANSFORMER DRIVER Figure 7. Driving Optocouplers ______________________________________________________________________________________ SPI/Microwire-Compatible ISO + 6N136 DIN MAX3100 6N136 SCLK V CC 470Ω 6N136 DOUT 6N136 CS +5V MAX667 MBR0520 LINEAR REGULATOR HALO TGM-010P3 UART in QSOP-16 ...
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... This helps minimize parasitic capacitance and noise pickup in the oscillator, and reduces EMI. Minimize capacitive loading minimize supply current. ISO + SCLK DIN MAX3100 DOUT TX GND PART PHONE NUMBER NUMBER ECS-18-13-1 (913) 782-7787 CSA1.84MG ...
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... This can relieve the remote processor to handle more useful tasks. In 9-bit mode, the MAX3100 is set up with 8 bits plus parity. The parity bit in all normal messages is clear, but is set in an address-type message. The MAX3100 pari- ty-interrupt mask is enabled to generate an interrupt on high parity ...
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... Figure 10. Bidirectional RS-232 IrDA Using an 8051 Interface to PIC Processor (“Quick Brown Fox” Generator) Figure 11 illustrates the use of the MAX3100 with the ® PIC . This circuit is a “Quick Brown Fox” generator that repeatedly transmits “THE QUICK BROWN FOX JUMPS OVER THE LAZY DOG” ...
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... STOP BITS 100k 7/8 BITS 100k B3 100k B2 100k B1 100k B0 100k Figure 11. Quick Brown Fox Generator ______________________________________________________________________________________ SPI/Microwire-Compatible RB7 PIC16C54 RB6 RA0 DIN MAX3100 RB5 RA1 DOUT RB4 RA2 SCLK RB3 RA3 CS X1 RB2 22pF RB1 RB0 UART in QSOP-16 MAX3221 8432MHz ...
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... SPI/Microwire-Compatible UART in QSOP-16 __________MAX3100 Synchronous-to-Asynchronous SPI UART at a Glance Table 9. Synchronous Data Input Format (DIN pin from microprocessor, SPI MOSI) Oper- ation Write FEN 1 1 SHDNi Config Read Config Write Data Read Data Table 10 ...
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Table 11. Bit Definitions* Bit Register Bit Set (1) Name Disable FIFO FEN Config buffer Config SHDNi Shutdown Enable transmit- TM Config done interrupt Enable data- RM Config received inter- rupt Enable parity PM Config interrupt Enable framing- RAM Config ...
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SPI/Microwire-Compatible UART in QSOP-16 Figure 12a. 8051 IrDA/RS-232 Code 20 ______________________________________________________________________________________ ...
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... Figure 12b. MAX3100 Using PIC µC ______________________________________________________________________________________ SPI/Microwire-Compatible UART in QSOP-16 21 ...
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... SPI/Microwire-Compatible UART in QSOP-16 Figure 12b. MAX3100 Using PIC µC (continued) 22 ______________________________________________________________________________________ ...
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... Operating Circuit SPI/MICROWIRE µC ______________________________________________________________________________________ SPI/Microwire-Compatible UART in QSOP-16 MAX3100 DIN TX DOUT RX SCLK CTS CS RTS IRQ C2 C1 MAX3223 RS-232 I/O 23 ...
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... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 24 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products ...