VSC870TX Vitesse Semiconductor Corp., VSC870TX Datasheet
VSC870TX
Specifications of VSC870TX
Available stocks
Related parts for VSC870TX
VSC870TX Summary of contents
Page 1
Data Sheet VSC870 Features • Performs 32-Bit Parallel to Serial and Serial to Parallel Functions • Serial Data Rates are 2.0Gb/s • Designed in Conjunction with the VSC880 Serial Crosspoint Switch • Performs Bit Alignment, Word Alignment and Cell Alignment ...
Page 2
High Performance Serial Backplane Transceiver General Description The VSC870 serial backplane transceiver has been designed to operate with the VSC880 serial crosspoint switch to establish a synchronous high performance switching system. The VSC870 can also connect directly to another transceiver ...
Page 3
Data Sheet VSC870 Package Pin Descriptions Symbol Name TXIN[31:0] Transmit Parallel Data In TXTYP[1:0] Transmit Word Type TXEN Transmit Enable RTR Ready To Receive Retransmit Mode/ RTM/TCLK Transmit Cell Clock RFM Read From Mark TXOK Transmit signal OK REN Read ...
Page 4
High Performance Serial Backplane Transceiver Symbol Name RXSEL Receive Input Select ALIVE Redundant Input Alive RXOK Receive Signal OK RXEN Receive Enable Receive Parallel Data RXOUT[31:0] Out RXTYP[1:0] Receive Word Type RXWA Receive Word Available Acknowledge / ACK/RCLK Receive Cell ...
Page 5
Data Sheet VSC870 Symbol Name DLYEN/ Delay Enable/Cell Clock CCKIN Input FACLPBK Facility Loopback WCLK Word Clock REFCLK Local Reference Clock RESET Reset TESTEN Scan Test Enable LTIME Loop Time Mode VSCTE NOR Chain Test Enable VDDA CMU Power Supply ...
Page 6
High Performance Serial Backplane Transceiver Functional Description The VSC870 transceiver can be used in one of the three operation modes: Packet Mode, Cell Mode and Direct Mode. In Packet mode, the VSC870 is intended to work in conjunction with the ...
Page 7
Data Sheet VSC870 The transceiver receives and feeds this serial data stream to a digital CRU to recover the bit clock and deserialize the data stream bit word plus 2 overhead bits at 62.5MHz. The transceiver also ...
Page 8
High Performance Serial Backplane Transceiver 1.1.5 Cell Synchronization If the CELLSYN signal is set HIGH, after the word synchronization process, the transceiver starts the cell synchronization process. In this process, the transceiver detects the received cell clock sent from the ...
Page 9
Data Sheet VSC870 1.2.1 Data Word Format at Transceiver Parallel Interface Data words contain a 32 bit user defined payload which is sent between the transmitting and receiving port cards as shown below. The RXTYP[1:0] and TXTYP[1:0] data word encoding ...
Page 10
High Performance Serial Backplane Transceiver 11XX0=Command word for receiving port card D[15:0]Optional data payload: Default=1010101010101010 IDLE Word from switch=Output(s) this port is connected to; If C[4:0]=01000, D[3:0]=DLYEN/CCKIN value 1.2.4 Command Word Format on the Serial Data Lines The command word ...
Page 11
Data Sheet VSC870 1.3 Loopback Mode The VSC870 supports two loopback functions at the serial interface. If the LOOPBACK signal is set HIGH, the serial transmit data is looped back to the CRU on the serial receiving side. The transmitted ...
Page 12
High Performance Serial Backplane Transceiver 2.0 Packet Mode 2.1 Overview In Packet Mode the BYPASS signal is set LOW to allow the transceiver to utilize the built-in retransmission, camp-on, virtual output queue and delayed read enable logic. In addition, the ...
Page 13
Data Sheet VSC870 2.2.1 Packet Format At both the transmit and receive sides, a start of packet is identified using a header word with TXTYP[1:0] and RXTYP[1:0] set to “10”. Following this header word are the rest of the data ...
Page 14
High Performance Serial Backplane Transceiver The IDLE word acts as a null word. The transceivers ignore these words at the transmit side. If there is no valid word at the transmit side, the signal TXEN should be set LOW. When ...
Page 15
Data Sheet VSC870 2.2.4 CRQ Format at the Transceiver TXIN[31:0] Interface The connection request command word format at the TXIN[31:0] interface is shown below. The signals CT[2:0] and MD[1:0] are used by the transceiver to control modes of operation that ...
Page 16
High Performance Serial Backplane Transceiver Where: B[1:0]00=Undefined, 01=Flow control channel, 10=Flow control channel, 11=Acknowledge BRK1=This is the CRQ word for ...
Page 17
Data Sheet VSC870 MD[1: Camp-on with Priority Mode 0 1 Multicast with Recast Mode 1 0 Multi Queue Mode Camp-on with Priority means the transceiver sends a repeated sequence of connection request words to the switch at a ...
Page 18
High Performance Serial Backplane Transceiver cards. During Early Arbitration, the early CRQ is camped on in the switch and is arbitrated every cycle until another IDLE or CRQ word arrives. This means the highest priority level regardless ...
Page 19
Data Sheet VSC870 2), it stops reading from the parallel interface by setting REN LOW, sets RTM/TCLK HIGH and starts sending a repeated sequence of CRQ words to the switch which are arbitrated only on the cycle that they arrive. ...
Page 20
High Performance Serial Backplane Transceiver If early arbitration is used, the first CRQ word is sent to the switch D cycles before the end of the current packet. If the ACK is not received before the end of the current ...
Page 21
Data Sheet VSC870 as shown in Figure 3. If DLYEN/CCKIN is HIGH, it waits for N more cycles before it sets REN HIGH. If the counter set by the CT[2:0] bits has expired and the transceiver has not received the ...
Page 22
High Performance Serial Backplane Transceiver Figure 5: Multicast Recast Functional Timing (Beginning of Multicast) WCLK TXIN[31:0] HDR CRQ TXTYP[1: ACK/RCLK REN RTM/TCLK RFM Figure 6: Multicast Recast Functional Timing (At the End of Packet then Recast) WCLK TXIN[31:0] ...
Page 23
Data Sheet VSC870 Similar to the Unicast/Multicast Camp-on request, in this mode, after the CRQ word is loaded in the transceiver parallel interface, it will transmit the CRQ word to the switch and wait for the ACK signal to be ...
Page 24
High Performance Serial Backplane Transceiver Figure 8: Multi Queue Transmitter Functional Timing (with early arbitration) WCLK TXIN[31:0] CRQ DX TXTYP[1:0] 3 ACK/RCLK REN RTM/TCLK 2.4 Receiver Operation In Packet Mode, the receiver examines incoming words and generates the data type ...
Page 25
Data Sheet VSC870 ALMOST_FULL signal from the receiving FIFO is connected to the RTR pin, and the REN signal is connected to the transmitting FIFO READ_ENABLE signal. In this way, when the receive FIFO is almost full, the transmit FIFO ...
Page 26
High Performance Serial Backplane Transceiver 3.0 Cell Mode 3.1 Overview In Cell Mode, a more sophisticated arbitration scheme can be supported by using the VSC870 and the VSC880 in conjunction with a user defined queuing logic on the port cards ...
Page 27
Data Sheet VSC870 Port Card Queuing System Port Card Queuing System 3.2 Data Encoding Format The data word and command word format is described in section 1.0. These word formats are similar for both the transceivers at the port cards ...
Page 28
High Performance Serial Backplane Transceiver words, are passed through the switch matrix. In this case, command words such as IDLEs must be used periodically for checking the link integrity. At the last word of a cell clock period, if the ...
Page 29
Data Sheet VSC870 4.0 Direct Mode 4.1 Overview The transceivers can directly connect to each other without a switch chip to form a simple port to port link. In this mode, the signal MODE[1] is set LOW and MODE[0] is ...
Page 30
High Performance Serial Backplane Transceiver Figure 14: Back Plane Interconnect Using VSC870 Transceivers Port Card Memory System Port Card Memory System 4.2 Data Encoding Format When the BYPASS signal is HIGH, the RXTYP[1:0] and TXTYP[1:0] signals are the direct representation ...
Page 31
Data Sheet VSC870 their reference clock inputs from the same source and use their internal CMU as the transmit bit clock. In this case the LTIME signal is set LOW. The transceivers on the port card use the recovered bit ...
Page 32
High Performance Serial Backplane Transceiver 4.6 Receiver Operation The functional timing diagram for the receive side is shown below synch word is received, the signals RXTYP[1:0] will be set to 00. If data is received, these bits will ...
Page 33
Data Sheet VSC870 AC Characteristics Table 1: LVDS and TTL Outputs Parameters Description T TTL Output Rise Time R,TTL T TTL Output Fall Time F,TTL T LVDS Output Rise Time R,LVDS T LVDS Output Fall Time F,LVDS Figure 17: Transmit ...
Page 34
High Performance Serial Backplane Transceiver Figure 18: Receive Data Output Timing Diagram WCLK RXOUT[31:0], RXTYP[1:0], RXWA, RXOK, TXOK, ACK/RCLK RFM, REN,RTM/TCLK WSIN Table 3: Receive Data Output Timing Table Parameter WCLK to RXOUT[31:0], RXTYP[1:0], RXWA, ACK/ T DEL1 RCLK, RXOK, ...
Page 35
Data Sheet VSC870 DC Characteristics Table 5: LVDS and TTL Inputs and Outputs Parameters Description V Output HIGH voltage (TTL Output LOW voltage (TTL O/P Common Mode Range (LVDS) OCM V Differential Output Voltage (LVDS) OUT ...
Page 36
High Performance Serial Backplane Transceiver Figure 19: LVDS Input and Output Buffer Designs Transmitter Power Dissipation Table 7: Power Supply Currents Parameter I Power supply current from Power supply current from V DDA P Power dissipation (V ...
Page 37
Data Sheet VSC870 Package Pin Description Signal Pin VSS A01 REFCLK A02 TXIN[3] A03 TXIN[1] A04 WSIN A05 WSOUT A06 VDD A07 RXOUT[30] A08 RXOUT[29] A09 VDD A10 RXOUT[24] A11 RTR A12 ABORT A13 MODE[0] A14 BYPASS A15 VSS A16 ...
Page 38
High Performance Serial Backplane Transceiver Signal Pin VSS P05 VDD P06 TXIN[17] P07 TXIN[20] P08 TXTYP[0] P09 RFM P10 VSS P11 VSS P12 NC P13 NC P14 TXIN[31] P15 Page 38 © VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • ...
Page 39
Data Sheet VSC870 Package Information © VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 G52190-0, Rev 4.1 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com 01/05/01 VITESSE SEMICONDUCTOR CORPORATION 192 BGA Package Internet: www.vitesse.com High ...
Page 40
High Performance Serial Backplane Transceiver Package Thermal Characteristics The VSC870 is packaged in a thermally-enhanced 21mm 192TBGA with an embedded heat sink. The heat sink surface configurations are shown in the package drawings. With natural convection, the junction-to-case thermal resistance ...