MAX3691 Maxim Integrated Products, MAX3691 Datasheet
MAX3691
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MAX3691 Summary of contents
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... Rev 1; 7/04 +3.3V, 622Mbps, SDH/SONET 4:1 Serializer with Clock Synthesis and LVDS Inputs _______________General Description The MAX3691 serializer is ideal for converting 4-bit- wide, 155Mbps parallel data to 622Mbps serial data in ATM and SDH/SONET applications. Operating from a single +3.3V supply, this device accepts low-voltage differential-signal (LVDS) clock and data inputs for interfacing with high-speed digital circuitry, and deliv- ers a 3 ...
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SDH/SONET 4:1 Serializer with Clock Synthesis and LVDS Inputs ABSOLUTE MAXIMUM RATINGS Terminal Voltage (with respect to GND) V .........................................................................-0. All Inputs.................................................-0. Output Current LVDS Outputs (PCLKO±)................................................10mA PECL Outputs (SD±).......................................................50mA Stresses beyond those ...
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SDH/SONET 4:1 Serializer with Clock Synthesis and LVDS Inputs AC ELECTRICAL CHARACTERISTICS (V = +3.0V to +3.6V, differential LVDS load = 100Ω ±1%, PECL loads = 50Ω ± noted. Typical values are ...
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SDH/SONET 4:1 Serializer with Clock Synthesis and LVDS Inputs ____________________________Typical Operating Characteristics (continued +3.0V to +3.6V, differential LVDS loads = 100Ω, unless otherwise noted.) CC PCLKO-to-PCLKI SKEW vs. TEMPERATURE -50 ...
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... SDH/SONET 4:1 Serializer with Clock Synthesis and LVDS Inputs _______________Detailed Description The MAX3691 serializer comprises a 4-bit parallel input register, a 4-bit shift register, control and timing logic, a PECL output buffer, LVDS input/output buffers, and a frequency-synthesizing PLL (consisting of a phase/ frequency detector, loop filter/amplifier, and voltage- controlled oscillator) ...
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... D3; PD2 = D2; PD1 = D1; PD0 = D0. Figure 2. Timing Diagram Low-Voltage Differential-Signal (LVDS) Inputs and Outputs The MAX3691 features LVDS inputs and outputs for interfacing with high-speed digital circuitry. The LVDS standard is based on the IEEE 1596.3 LVDS specifi- cation. This technology uses 250mV–400mV differen- ...
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... Layout Techniques For best performance, use good high-frequency layout techniques. Filter voltage supplies and keep ground connections short. Use multiple vias where possible. Also, use controlled-impedance transmission lines to interface with the MAX3691 clock and data inputs and outputs. +3.3V 130Ω MAX3691 ...
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... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2004 Maxim Integrated Products PACKAGE OUTLINE, 32/48L TQFP, 7x7x1.4mm PACKAGE OUTLINE, 32/48L TQFP, 7x7x1 ...