AS7C1026-12JC Alliance Semiconductor, AS7C1026-12JC Datasheet

no-image

AS7C1026-12JC

Manufacturer Part Number
AS7C1026-12JC
Description
5V 64K x 16 CM0S SRAM , 12ns access time
Manufacturer
Alliance Semiconductor
Datasheet
Features
• AS7C1026 (5V version)
• AS7C31026 (3.3V version)
• Industrial and commercial versions
• Organization: 65,536 words x 16 bits
• Center power and ground pins for low noise
• High speed
• Low power consumption: ACTIVE
Logic block diagram
Selection guide
Shaded areas indicate preliminary information.
Maximum address access time
Maximum output enable access time
Maximum operating current
Maximum CMOS standby current
March 2001
- 12/15/20 ns address access time
- 6,7,8 ns output enable access time
- 880 mW (AS7C1026) / max @ 12 ns
- 396 mW (AS7C31026) / max @ 12 ns
WE
UB
3/23/01; v.1.0
OE
LB
CE
I/O8–I/O15
I/O0–I/O7
A0
A1
A2
A3
A4
A5
A6
A7
buffer
I/O
Column decoder
Control circuit
64K × 16
Array
Alliance Semiconductor
5V/3.3V 64K×16 CMOS SRAM
AS7C31026
AS7C31026
AS7C1026
AS7C1026
V
GND
CC
Pin arrangement
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
GND
A15
A14
A13
A12
V
WE
NC
44-Pin SOJ, TSOP II (400 mil)
A4
A3
A2
A1
A0
CE
CC
AS7C31026-12
AS7C1026-12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
• Low power consumption: STANDBY
• 2.0V data retention
• Easy memory expansion with CE, OE inputs
• TTL-compatible, three-state I/O
• JEDEC standard packaging
• ESD protection
• Latch-up current
- 28 mW (AS7C1026) / max CMOS I/O
- 18 mW (AS7C31026) / max CMOS I/O
- 44-pin 400 mil SOJ
- 44-pin 400 mil TSOP II
- 48-ball 6 mm × 8 mm CSP mBGA
160
110
12
10
10
6
®
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
OE
A5
A6
A7
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
V
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
CC
AS7C31026-15
AS7C1026-15
48-CSP mini Ball-Grid-Array Package
D
G I/O15 NC
H
A
B
C
E
F I/O14 I/O13 A14
2000 volts
150
100
200 mA
15
10
10
I/O8
I/O9 I/O10
V
8
V
NC
LB
1
DD
SS
I/O11 NC
I/O12 NC
Copyright © Alliance Semiconductor. All rights reserved.
OE
UB
A8
2
AS7C31026-20
AS7C1026-20
A12
A3
A5
A9
A
3
0
140
20
10
90
15
15
P. 1 of 10
A15 I/O5 I/O6
A13 WE
A10 A11
NC I/O4
A4
A6 I/O1 I/O2
A7 I/O3 V
A
4
1
AS7C31026
AS7C1026
A
CE
5
2
Unit
mA
mA
mA
mA
I/O0
I/O7
ns
ns
NC
V
NC
6
DD
SS

Related parts for AS7C1026-12JC

AS7C1026-12JC Summary of contents

Page 1

... Organization: 65,536 words x 16 bits • Center power and ground pins for low noise • High speed - 12/15/20 ns address access time - 6,7,8 ns output enable access time • Low power consumption: ACTIVE - 880 mW (AS7C1026) / max @ 396 mW (AS7C31026) / max @ 12 ns Logic block diagram 64K × ...

Page 2

... Equal address access and cycle times (t for high-performance applications. When CE is high the devices enter stanby mode. The AS7C1026 is guaranteed not to exceed 28 mW power consumption in CMOS standby mode. The devices also offer 2.0V data retention. A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O0–I/O15 is written on the rising edge of WE (write cycle (write cycle 2) ...

Page 3

... GND Max GND Max AS7C1026 IL AS7C31026 = 1/t Max AS7C1026 IL AS7C31026 = 1/t Max RC V –0.2V, AS7C1026 CC GND + 0.2V or AS7C31026 V –0.2V Min CC = Min NOMINAL) CC Symbol Signals C A, CE, WE, OE, LB I/O I/O Alliance Semiconductor AS7C1026 AS7C31026 I/O8–I/O15 Mode D Write I/O8– ...

Page 4

... PU t – 12 – PD Falling input 3,6,7 Data valid 3,6,8 OLZ t ACE BLZ Alliance Semiconductor AS7C1026 AS7C31026 -20 Max Min Max Unit Notes – 20 – – – – – 4 – ns – 0 – – ...

Page 5

... Data undefined 10, Data undefined Alliance Semiconductor AS7C1026 AS7C31026 -15 -20 Unit Notes 15 – 20 – – 13 – – 12 – – 0 – – 12 – – ...

Page 6

... Data retention mode CDR +5V 480W D OUT 255W C(14) GND Figure B: 5V Output load required to meet I specification Alliance Semiconductor AS7C1026 AS7C31026 Min Max Unit 2.0 – – – t – RC – Thevenin Equivalent: 168W D +1.728V (5V and 3.3V) OUT +3 ...

Page 7

... OL vs. output voltage V OL 140 (NOMINAL 120 100 Output voltage (V) Alliance Semiconductor AS7C1026 AS7C31026 , I Normalized supply current vs. ambient temperature T a 625 (NOMINAL 0.2 0.04 -55 -10 35 125 Ambient temperature (°C) ...

Page 8

... D e 44-pin SOJ Pin Seating b Plane 3/23/01; v.1.0 ® 0– Alliance Semiconductor AS7C1026 AS7C31026 44-pin TSOP II Min Max (mm) (mm) A 1.2 A1 0.05 A2 0.95 1.05 b 0.45 0.30 c 0.127 (typical) D 18.28 18.54 E 10.29 10.03 He 11.56 11.96 e 0.80 (typical) l 0.40 0.60 44-pin SOJ 400 mL Min ...

Page 9

... Maximum 0.75 – 8.00 8.10 3.75 – 8.00 8.10 5.25 – 0.35 – – 1.20 0.68 – 0.25 0.27 – 0.08 Alliance Semiconductor AS7C1026 AS7C31026 Top View Ball #A1 index SRAM DIE Elastomer B Detail View Die 0.3/T p Notes 1 Bump counts row x 6 column). 2 Pitch: (x, 0.75 mm (typ). 3 Units: millimeters. 4 All tolerance are +/- 0.050 unless otherwise specified ...

Page 10

... Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use ® Volt/Temp 12 ns AS7C1026-12JC AS7C1026-12JI AS7C31026-12JC AS7C1026-12TC AS7C31026-12TC ...

Related keywords