BS616LV2016EI-70 Brilliance Semiconductor, Inc., BS616LV2016EI-70 Datasheet

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BS616LV2016EI-70

Manufacturer Part Number
BS616LV2016EI-70
Description
Manufacturer
Brilliance Semiconductor, Inc.
Datasheet
n FEATURES
Ÿ Wide V
Ÿ Very low power consumption :
Ÿ High speed access time :
Ÿ Automatic power down when chip is deselected
Ÿ Easy expansion with CE and OE options
Ÿ I/O Configuration x8/x16 selectable by LB and UB pin.
Ÿ Three state outputs and TTL compatible
Ÿ Fully static operation
Ÿ Data retention supply voltage as low as 1.5V
n POWER CONSUMPTION
n PIN CONFIGURATIONS
R0201-BS66LV2016
BS616LV2016DC
BS616LV2016EC
BS616LV2016AI
BS616LV2016EI
PRODUCT
Brilliance Semiconductor, Inc.
V
V
-55
-70
FAMILY
CC
CC
= 3.0V
= 5.0V
CC
operation voltage : 2.4V ~ 5.5V
VCC
DQ0
DQ1
DQ2
DQ3
VSS
DQ4
DQ5
DQ6
DQ7
A16
A15
A14
A13
A12
WE
CE
G
A
B
C
D
E
F
H
A4
A3
A2
A1
A0
VSS
VCC
D14
D15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
NC
Operation current : 30mA (Max.) at 55ns
Standby current :
Operation current : 62mA (Max.) at 55ns
Standby current :
55ns(Max.) at V
70ns(Max.) at V
TEMPERATURE
LB
D8
D9
1
-40
+0
OPERATING
Commercial
O
D10
D11
D12
D13
BS616LV2016EC
BS616LV2016EI
OE
NC
Industrial
O
UB
A8
2
48-ball BGA top view
C to +70
C to +85
A14
A12
NC
NC
A0
A3
A5
A9
3
O
Pb-Free and Green package materials are compliant to RoHS
O
A16
A15
A13
A10
Very Low Power CMOS SRAM
128K X 16 bit
A1
A4
A6
A7
C
4
C
CC
CC
=3.0~5.5V
=2.7~5.5V
WE
A11
0.1uA (Typ.) at 25
0.6uA (Typ.) at 25
CE
D1
D3
D4
D5
A2
5
V
2mA (Max.) at 1MHz
8mA (Max.) at 1MHz
6.0uA
CC
20uA
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
=5.0V
VCC
VSS
NC
D0
D2
D6
D7
NC
STANDBY
6
(I
CCSB1
A5
A6
A7
OE
UB
LB
DQ15
DQ14
DQ13
DQ12
VSS
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
NC
, Max)
V
CC
0.7uA
2.0uA
reserves the right to change products and specifications without notice.
=3.0V
O
O
C
C
1MHz
7mA
8mA
POWER DISSIPATION
1
V
n DESCRIPTION
The BS616LV2016 is a high performance, very low power CMOS
Static Random Access Memory organized as 131,072 by 16 bits and
operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical CMOS standby
current of 0.1uA at 3.0V/25
3.0V/85
Easy memory expansion is provided by an active LOW chip enable
(CE) and active LOW output enable (OE) and three-state output
drivers.
The BS616LV2016 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BS616LV2016 is available in DICE form, JEDEC standard
44-pin TSOP II package and 48-ball BGA package.
n BLOCK DIAGRAM
10MHz
CC
39mA
40mA
=5.0V
DQ15
DQ0
A10
A11
WE
OE
V
V
CE
UB
A9
A8
A7
A6
A5
A4
A3
A2
LB
.
.
.
.
.
.
CC
SS
O
C.
.
.
.
.
.
.
60mA
62mA
f
Max.
Address
Buffer
Input
Operating
(I
Control
CC
16
16
, Max)
1.5mA
1MHz
10
2mA
O
Output
Buffer
Buffer
C and maximum access time of 55ns at
Input
Data
Data
Decoder
Row
V
10MHz
14mA
15mA
CC
BS616LV2016
=3.0V
16
16
1024
A12
29mA
30mA
f
Max.
A13
Address Input Buffer
Column Decoder
A14
Memory Array
1024 x 2048
Write Driver
Column I/O
Sense Amp
Revision
Nov.
A15 A16 A0
DICE
TSOP II-44
BGA-48-0608
TSOP II-44
PKG TYPE
2048
128
7
2006
A1
1.4

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BS616LV2016EI-70 Summary of contents

Page 1

... BS616LV2016EC BS616LV2016AI Industrial +85 C BS616LV2016EI n PIN CONFIGURATIONS DQ0 7 DQ1 8 DQ2 9 DQ3 10 BS616LV2016EC VCC 11 VSS 12 BS616LV2016EI DQ4 13 DQ5 14 DQ6 15 DQ7 A16 18 A15 19 A14 20 A13 21 A12 ...

Page 2

PIN DESCRIPTIONS Name A0-A16 Address Input CE Chip Enable Input WE Write Enable Input OE Output Enable Input LB and UB Data Byte Control Input DQ0-DQ15 Data Input/Output Ports TRUTH TABLE MODE CE H ...

Page 3

ABSOLUTE MAXIMUM RATINGS SYMBOL PARAMETER Terminal Voltage with V TERM Respect to GND Temperature Under T BIAS Bias T Storage Temperature STG P Power Dissipation Output Current OUT 1. Stresses greater than those listed under ABSOLUTE ...

Page 4

DATA RETENTION CHARACTERISTICS (T SYMBOL PARAMETER V V for Data Retention DR CC (3) I Data Retention Current CCDR Chip Deselect to Data t CDR Retention Time t Operation Recovery Time =1.5V, T =25 C ...

Page 5

AC ELECTRICAL CHARACTERISTICS (T READ CYCLE JEDEC PARANETER PARAMETER NAME NAME t t Read Cycle Time AVAX Address Access Time AVQX Chip Select Access Time ELQV ACS t t Data Byte Control Access ...

Page 6

READ CYCLE OUT (1, 4) READ CYCLE 3 ADDRESS OUT NOTES high in read Cycle. 2. Device is continuously selected when Address ...

Page 7

AC ELECTRICAL CHARACTERISTICS (T WRITE CYCLE JEDEC PARANETER PARAMETER NAME NAME t t Write Cycle Time AVAX Address Set up Time AVWL Address Valid to End of Write AVWH Chip ...

Page 8

WRITE CYCLE 2 ADDRESS CE LB OUT D IN NOTES must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE and WE low. ...

Page 9

ORDERING INFORMATION BS616LV2016 Note: BSI (Brilliance Semiconductor Inc.) assumes no responsibility for the application or use of any product or circuit described herein. BSI does not authorize its products for use as critical components in any application in which ...

Page 10

PACKAGE DIMENSIONS (continued) VIEW A 48 mini-BGA (6 x 8mm) R0201-BS616LV2016 D1 10 BS616LV2016 NOTES : 1: CONTROLLING DIMENSIONS ARE IN MILLIMETERS. 2: PIN#1 DOT MARKING BY LASER OR PAD PRINT. 3: SYMBOL "N" IS THE NUMBER OF SOLDER ...

Page 11

Revision History Revision No. History 1.2 Add Icc1 characteristic parameter Improve Iccsb1 spec. I-grade from 30uA to 20uA at 5.0V C-grade from 10uA to 6.0uA at 5.0V 1.3 Change I-grade operation temperature range - from –25 O 1.4 Add ...

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